commit 198c85878af8927702516df12a8786cda4a93ead
author Sam Elliott <selliott@lowrisc.org> Thu Oct 15 16:43:29 2020 +0100
committer Sam Elliott <sam@lenary.co.uk> Thu Oct 15 19:20:02 2020 +0100
tree 6fce7f9108256b8185e9de4c2dcaefcb79e71b10
parent ae1bab609a63cdbbd24948a63d9ee23299909611

[sw] Update UART DIF Reggen Value Uses

Signed-off-by: Sam Elliott <selliott@lowrisc.org>

sw/device/lib/dif/dif_uart.c

diff --git a/sw/device/lib/dif/dif_uart.c b/sw/device/lib/dif/dif_uart.c
index a991191..815473b 100644
--- a/sw/device/lib/dif/dif_uart.c
+++ b/sw/device/lib/dif/dif_uart.c
@@ -332,19 +332,19 @@
   uint32_t value;
   switch (watermark) {
     case kDifUartWatermarkByte1:
-      value = UART_FIFO_CTRL_RXILVL_RXLVL1;
+      value = UART_FIFO_CTRL_RXILVL_VALUE_RXLVL1;
       break;
     case kDifUartWatermarkByte4:
-      value = UART_FIFO_CTRL_RXILVL_RXLVL4;
+      value = UART_FIFO_CTRL_RXILVL_VALUE_RXLVL4;
       break;
     case kDifUartWatermarkByte8:
-      value = UART_FIFO_CTRL_RXILVL_RXLVL8;
+      value = UART_FIFO_CTRL_RXILVL_VALUE_RXLVL8;
       break;
     case kDifUartWatermarkByte16:
-      value = UART_FIFO_CTRL_RXILVL_RXLVL16;
+      value = UART_FIFO_CTRL_RXILVL_VALUE_RXLVL16;
       break;
     case kDifUartWatermarkByte30:
-      value = UART_FIFO_CTRL_RXILVL_RXLVL30;
+      value = UART_FIFO_CTRL_RXILVL_VALUE_RXLVL30;
       break;
     default:
       return kDifUartError;
@@ -371,16 +371,16 @@
   uint32_t value;
   switch (watermark) {
     case kDifUartWatermarkByte1:
-      value = UART_FIFO_CTRL_TXILVL_TXLVL1;
+      value = UART_FIFO_CTRL_TXILVL_VALUE_TXLVL1;
       break;
     case kDifUartWatermarkByte4:
-      value = UART_FIFO_CTRL_TXILVL_TXLVL4;
+      value = UART_FIFO_CTRL_TXILVL_VALUE_TXLVL4;
       break;
     case kDifUartWatermarkByte8:
-      value = UART_FIFO_CTRL_TXILVL_TXLVL8;
+      value = UART_FIFO_CTRL_TXILVL_VALUE_TXLVL8;
       break;
     case kDifUartWatermarkByte16:
-      value = UART_FIFO_CTRL_TXILVL_TXLVL16;
+      value = UART_FIFO_CTRL_TXILVL_VALUE_TXLVL16;
       break;
     default:
       // The minimal TX watermark is 1 byte, maximal 16 bytes.

sw/device/tests/dif/dif_uart_unittest.cc

diff --git a/sw/device/tests/dif/dif_uart_unittest.cc b/sw/device/tests/dif/dif_uart_unittest.cc
index 130c3c5..5c34cfc 100644
--- a/sw/device/tests/dif/dif_uart_unittest.cc
+++ b/sw/device/tests/dif/dif_uart_unittest.cc
@@ -148,7 +148,7 @@
   EXPECT_MASK32(UART_FIFO_CTRL_REG_OFFSET,
                 {
                     {UART_FIFO_CTRL_RXILVL_OFFSET, UART_FIFO_CTRL_RXILVL_MASK,
-                     UART_FIFO_CTRL_RXILVL_RXLVL1},
+                     UART_FIFO_CTRL_RXILVL_VALUE_RXLVL1},
                 });
   EXPECT_EQ(dif_uart_watermark_rx_set(&uart_, kDifUartWatermarkByte1),
             kDifUartOk);
@@ -156,7 +156,7 @@
   EXPECT_MASK32(UART_FIFO_CTRL_REG_OFFSET,
                 {
                     {UART_FIFO_CTRL_RXILVL_OFFSET, UART_FIFO_CTRL_RXILVL_MASK,
-                     UART_FIFO_CTRL_RXILVL_RXLVL30},
+                     UART_FIFO_CTRL_RXILVL_VALUE_RXLVL30},
                 });
   EXPECT_EQ(dif_uart_watermark_rx_set(&uart_, kDifUartWatermarkByte30),
             kDifUartOk);
@@ -181,7 +181,7 @@
   EXPECT_MASK32(UART_FIFO_CTRL_REG_OFFSET,
                 {
                     {UART_FIFO_CTRL_TXILVL_OFFSET, UART_FIFO_CTRL_TXILVL_MASK,
-                     UART_FIFO_CTRL_TXILVL_TXLVL1},
+                     UART_FIFO_CTRL_TXILVL_VALUE_TXLVL1},
                 });
   EXPECT_EQ(dif_uart_watermark_tx_set(&uart_, kDifUartWatermarkByte1),
             kDifUartOk);
@@ -189,7 +189,7 @@
   EXPECT_MASK32(UART_FIFO_CTRL_REG_OFFSET,
                 {
                     {UART_FIFO_CTRL_TXILVL_OFFSET, UART_FIFO_CTRL_TXILVL_MASK,
-                     UART_FIFO_CTRL_TXILVL_TXLVL16},
+                     UART_FIFO_CTRL_TXILVL_VALUE_TXLVL16},
                 });
   EXPECT_EQ(dif_uart_watermark_tx_set(&uart_, kDifUartWatermarkByte16),
             kDifUartOk);