| commit | ba061ed571068884e7f9d7bc10d30cbb8dd4ebf9 | [log] [tgz] |
|---|---|---|
| author | Timothy Trippel <ttrippel@google.com> | Wed Mar 23 00:30:22 2022 -0700 |
| committer | Timothy Trippel <5633066+timothytrippel@users.noreply.github.com> | Thu Mar 24 15:58:13 2022 -0700 |
| tree | de62d33c14b50f83d2b8d1a305e1ff64123723aa | |
| parent | 6e3c0ed6b4360cee76fe6fb1b77d30214c3e17e7 [diff] |
[bazel] Add rules to generate SPI Flash frames for DV bootstrap DV simulations can load the flash either via backdoor memory write, or bootstrap. If via bootstrap, a special image must be prepared so that the test bench can feed the correct SPI flash frames to the DUT. This commit adds custom bazel rules to generate this flash image. This partially addresses #11559. Signed-off-by: Timothy Trippel <ttrippel@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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