[sw, dif, aes] Remove translation of enums
- Set the public enums with the values that can be used to set the registers.
- Use the mode field of the transaction struct to define the aes mode.
This fixes lowRISC/OpenTitan#10487
Signed-off-by: Douglas Reis <doreis@lowrisc.org>
diff --git a/sw/device/lib/dif/dif_aes.c b/sw/device/lib/dif/dif_aes.c
index 8666cc8..e9f850d 100644
--- a/sw/device/lib/dif/dif_aes.c
+++ b/sw/device/lib/dif/dif_aes.c
@@ -16,47 +16,6 @@
* aes.CTRL.
*/
-/*
- * Field to select AES operation.
- *
- * Invalid input values, i.e., value with multiple bits set - are mapped to
- * `kAesOperationFieldValEnc`.
- */
-typedef enum aes_operation_field_val {
- kAesOperationFieldValInvalid = 0x0,
- kAesOperationFieldValEnc = 0x1, /**< Enrcyption. */
- kAesOperationFieldValDec = 0x2, /**< Decryption. */
-} aes_operation_field_val_t;
-
-/*
- * Field to select AES block cipher mode.
- *
- * Invalid input values, i.e., value with multiple bits set - are mapped to
- * `kAesModeFieldValNone`.
- */
-typedef enum aes_mode_field_val {
- kAesModeFieldValEcb = 0x01, /**< The Electronic Codebook Mode. */
- kAesModeFieldValCbc = 0x02, /**< The Cipher Block Chaining Mode. */
- kAesModeFieldValCfb = 0x04, /**< TODO */
- kAesModeFieldValOfb = 0x08, /**< TODO */
- kAesModeFieldValCtr = 0x10, /**< The Counter Mode. */
- kAesModeFieldValNone = 0x20, /**< TODO */
-} aes_mode_field_val_t;
-
-/*
- * Field to select AES key length.
- *
- * Invalid input values, i.e., value with multiple bits set, value 3'b000, and
- * value 3'b010 in case 192-bit keys are not supported (disabled at compile
- * time) are mapped to `kAesKeyFieldVal256`.
- */
-typedef enum aes_key_field_val {
- kAesKeyFieldValInvalid = 0x00,
- kAesKeyFieldVal128 = 0x01,
- kAesKeyFieldVal192 = 0x02,
- kAesKeyFieldVal256 = 0x04,
-} aes_key_field_val_t;
-
static bool aes_idle(const dif_aes_t *aes) {
return mmio_region_get_bit32(aes->base_addr, AES_STATUS_REG_OFFSET,
AES_STATUS_IDLE_BIT);
@@ -123,101 +82,29 @@
}
}
-static aes_operation_field_val_t operation_to_field(
- dif_aes_operation_t operation) {
- switch (operation) {
- case kDifAesOperationEncrypt:
- return kAesOperationFieldValEnc;
- case kDifAesOperationDecrypt:
- return kAesOperationFieldValDec;
- default:
- return kAesOperationFieldValInvalid;
- }
-}
-
-// TODO: We should extract the MODE from the transaction using this function and
-// not separately provide it. See
-// https://github.com/lowRISC/opentitan/issues/10487
-// static aes_mode_field_val_t mode_to_field(dif_aes_mode_t mode) {
-// switch (mode) {
-// case kDifAesModeEcb:
-// return kAesModeFieldValEcb;
-// case kDifAesModeCbc:
-// return kAesModeFieldValCbc;
-// case kDifAesModeCfb:
-// return kAesModeFieldValCfb;
-// case kDifAesModeOfb:
-// return kAesModeFieldValOfb;
-// case kDifAesModeCtr:
-// return kAesModeFieldValCtr;
-// default:
-// return kAesModeFieldValNone;
-// }
-//}
-
-static aes_key_field_val_t key_to_field(dif_aes_key_length_t key) {
- switch (key) {
- case kDifAesKey128:
- return kAesKeyFieldVal128;
- case kDifAesKey192:
- return kAesKeyFieldVal192;
- case kDifAesKey256:
- return kAesKeyFieldVal256;
- default:
- return kAesKeyFieldValInvalid;
- }
-}
-
/**
* Configures AES. Is used by every `dif_aes_start_<mode>` function.
*
* @param aes AES state data.
* @param transaction Configuration data, common across all Cipher modes.
- * @param mode_val Block cipher mode of operation register write value.
* @return `dif_result_t`.
*/
static dif_result_t configure(const dif_aes_t *aes,
- const dif_aes_transaction_t *transaction,
- aes_mode_field_val_t mode_val) {
- aes_operation_field_val_t operation_val =
- operation_to_field(transaction->operation);
- if (operation_val == kAesOperationFieldValInvalid) {
- return kDifError;
- }
- // TODO: We should extract the mode from the transaction and not separately
- // provide it. See https://github.com/lowRISC/opentitan/issues/10487
- // aes_mode_field_val_t mode_val = mode_to_field(transaction->mode);
- // if (mode_val == kAesModeFieldValNone) {
- // return kDifError;
- //}
- aes_key_field_val_t key_len_val = key_to_field(transaction->key_len);
- if (key_len_val == kAesKeyFieldValInvalid) {
- return kDifError;
- }
-
+ const dif_aes_transaction_t *transaction) {
uint32_t reg = bitfield_field32_write(0, AES_CTRL_SHADOWED_OPERATION_FIELD,
- operation_val);
+ transaction->operation);
- reg = bitfield_field32_write(reg, AES_CTRL_SHADOWED_MODE_FIELD, mode_val);
+ reg = bitfield_field32_write(reg, AES_CTRL_SHADOWED_MODE_FIELD,
+ transaction->mode);
- reg =
- bitfield_field32_write(reg, AES_CTRL_SHADOWED_KEY_LEN_FIELD, key_len_val);
+ reg = bitfield_field32_write(reg, AES_CTRL_SHADOWED_KEY_LEN_FIELD,
+ transaction->key_len);
- if (transaction->manual_operation == kDifAesManualOperationManual) {
- reg =
- bitfield_bit32_write(reg, AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, true);
- } else {
- reg = bitfield_bit32_write(reg, AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT,
- false);
- }
+ bool flag = transaction->manual_operation == kDifAesManualOperationManual;
+ reg = bitfield_bit32_write(reg, AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, flag);
- if (transaction->masking == kDifAesMaskingForceZero) {
- reg =
- bitfield_bit32_write(reg, AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, true);
- } else {
- reg = bitfield_bit32_write(reg, AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT,
- false);
- }
+ flag = transaction->masking == kDifAesMaskingForceZero;
+ reg = bitfield_bit32_write(reg, AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, flag);
aes_shadowed_write(aes->base_addr, AES_CTRL_SHADOWED_REG_OFFSET, reg);
@@ -276,7 +163,7 @@
return kDifUnavailable;
}
- dif_result_t result = configure(aes, transaction, kAesModeFieldValEcb);
+ dif_result_t result = configure(aes, transaction);
if (result != kDifOk) {
return result;
}
@@ -301,7 +188,7 @@
return kDifUnavailable;
}
- dif_result_t result = configure(aes, transaction, kAesModeFieldValCbc);
+ dif_result_t result = configure(aes, transaction);
if (result != kDifOk) {
return result;
}
@@ -328,7 +215,7 @@
return kDifUnavailable;
}
- dif_result_t result = configure(aes, transaction, kAesModeFieldValCtr);
+ dif_result_t result = configure(aes, transaction);
if (result != kDifOk) {
return result;
}
@@ -355,7 +242,7 @@
return kDifUnavailable;
}
- dif_result_t result = configure(aes, transaction, kAesModeFieldValOfb);
+ dif_result_t result = configure(aes, transaction);
if (result != kDifOk) {
return result;
}
@@ -382,7 +269,7 @@
return kDifUnavailable;
}
- dif_result_t result = configure(aes, transaction, kAesModeFieldValCfb);
+ dif_result_t result = configure(aes, transaction);
if (result != kDifOk) {
return result;
}
diff --git a/sw/device/lib/dif/dif_aes.h b/sw/device/lib/dif/dif_aes.h
index f75a7ce..e2231f9 100644
--- a/sw/device/lib/dif/dif_aes.h
+++ b/sw/device/lib/dif/dif_aes.h
@@ -88,11 +88,11 @@
/**
* AES encryption.
*/
- kDifAesOperationEncrypt = 0,
+ kDifAesOperationEncrypt = 1,
/**
* AES decryption.
*/
- kDifAesOperationDecrypt,
+ kDifAesOperationDecrypt = 2,
} dif_aes_operation_t;
/**
@@ -102,23 +102,27 @@
/**
* The Electronic Codebook Mode.
*/
- kDifAesModeEcb = 0,
+ kDifAesModeEcb = 1,
+
/**
* The Cipher Block Chaining Mode.
*/
- kDifAesModeCbc,
+ kDifAesModeCbc = (1 << 1),
+
/**
* The Cipher Feedback Mode.
*/
- kDifAesModeCfb,
+ kDifAesModeCfb = (1 << 2),
+
/**
* The Output Feedback Mode.
*/
- kDifAesModeOfb,
+ kDifAesModeOfb = (1 << 3),
+
/**
* The Counter Mode.
*/
- kDifAesModeCtr,
+ kDifAesModeCtr = (1 << 4),
} dif_aes_mode_t;
/**
@@ -128,15 +132,15 @@
/**
* 128 bit wide AES key.
*/
- kDifAesKey128 = 0,
+ kDifAesKey128 = 1,
/**
* 192 bit wide AES key.
*/
- kDifAesKey192,
+ kDifAesKey192 = (1 << 1),
/**
* 256 bit wide AES key.
*/
- kDifAesKey256,
+ kDifAesKey256 = (1 << 2)
} dif_aes_key_length_t;
/**
diff --git a/sw/device/lib/dif/dif_aes_unittest.cc b/sw/device/lib/dif/dif_aes_unittest.cc
index 0c13bd2..d9db2f4 100644
--- a/sw/device/lib/dif/dif_aes_unittest.cc
+++ b/sw/device/lib/dif/dif_aes_unittest.cc
@@ -59,7 +59,7 @@
protected:
dif_aes_t aes_;
- const dif_aes_transaction_t kTransaction = {
+ dif_aes_transaction_t transaction = {
.operation = kDifAesOperationEncrypt,
.mode = kDifAesModeEcb,
.key_len = kDifAesKey128,
@@ -79,94 +79,112 @@
};
// ECB tests
-class EcbTest : public AesTestInitialized {};
+class EcbTest : public AesTestInitialized {
+ protected:
+ EcbTest() { transaction.mode = kDifAesModeEcb; }
+};
TEST_F(EcbTest, start) {
EXPECT_READ32(AES_STATUS_REG_OFFSET, 1);
for (int i = 0; i < 2; i++) {
- EXPECT_WRITE32(AES_CTRL_SHADOWED_REG_OFFSET,
- {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, 0x01},
- {AES_CTRL_SHADOWED_MODE_OFFSET, 0x01},
- {AES_CTRL_SHADOWED_OPERATION_OFFSET, 0x1},
- {AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
- {AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
+ EXPECT_WRITE32(
+ AES_CTRL_SHADOWED_REG_OFFSET,
+ {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, kDifAesKey128},
+ {AES_CTRL_SHADOWED_MODE_OFFSET, kDifAesModeEcb},
+ {AES_CTRL_SHADOWED_OPERATION_OFFSET, kDifAesOperationEncrypt},
+ {AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
+ {AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
}
setExpectedKey(kKey_, 8);
- EXPECT_EQ(dif_aes_start_ecb(&aes_, &kTransaction, kKey_), kDifOk);
+ EXPECT_EQ(dif_aes_start_ecb(&aes_, &transaction, kKey_), kDifOk);
}
-// CBC tests
-class CbcTest : public AesTestInitialized {};
+class CbcTest : public AesTestInitialized {
+ protected:
+ CbcTest() { transaction.mode = kDifAesModeCbc; }
+};
TEST_F(CbcTest, start) {
EXPECT_READ32(AES_STATUS_REG_OFFSET, 1);
for (int i = 0; i < 2; i++) {
- EXPECT_WRITE32(AES_CTRL_SHADOWED_REG_OFFSET,
- {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, 0x01},
- {AES_CTRL_SHADOWED_MODE_OFFSET, 0x02},
- {AES_CTRL_SHADOWED_OPERATION_OFFSET, 0x1},
- {AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
- {AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
+ EXPECT_WRITE32(
+ AES_CTRL_SHADOWED_REG_OFFSET,
+ {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, kDifAesKey128},
+ {AES_CTRL_SHADOWED_MODE_OFFSET, kDifAesModeCbc},
+ {AES_CTRL_SHADOWED_OPERATION_OFFSET, kDifAesOperationEncrypt},
+ {AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
+ {AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
}
setExpectedKey(kKey_, 8);
setExpectedIv(kIv_);
- EXPECT_EQ(dif_aes_start_cbc(&aes_, &kTransaction, kKey_, kIv_), kDifOk);
+ EXPECT_EQ(dif_aes_start_cbc(&aes_, &transaction, kKey_, kIv_), kDifOk);
}
// CFB tests
-class CFBTest : public AesTestInitialized {};
+class CFBTest : public AesTestInitialized {
+ protected:
+ CFBTest() { transaction.mode = kDifAesModeCfb; }
+};
TEST_F(CFBTest, start) {
EXPECT_READ32(AES_STATUS_REG_OFFSET, 1);
for (int i = 0; i < 2; i++) {
- EXPECT_WRITE32(AES_CTRL_SHADOWED_REG_OFFSET,
- {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, 0x01},
- {AES_CTRL_SHADOWED_MODE_OFFSET, 0x04},
- {AES_CTRL_SHADOWED_OPERATION_OFFSET, 0x1},
- {AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
- {AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
+ EXPECT_WRITE32(
+ AES_CTRL_SHADOWED_REG_OFFSET,
+ {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, kDifAesKey128},
+ {AES_CTRL_SHADOWED_MODE_OFFSET, kDifAesModeCfb},
+ {AES_CTRL_SHADOWED_OPERATION_OFFSET, kDifAesOperationEncrypt},
+ {AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
+ {AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
}
setExpectedKey(kKey_, 8);
setExpectedIv(kIv_);
- EXPECT_EQ(dif_aes_start_cfb(&aes_, &kTransaction, kKey_, kIv_), kDifOk);
+ EXPECT_EQ(dif_aes_start_cfb(&aes_, &transaction, kKey_, kIv_), kDifOk);
}
// OFB tests
-class OFBTest : public AesTestInitialized {};
+class OFBTest : public AesTestInitialized {
+ protected:
+ OFBTest() { transaction.mode = kDifAesModeOfb; }
+};
TEST_F(OFBTest, start) {
EXPECT_READ32(AES_STATUS_REG_OFFSET, 1);
for (int i = 0; i < 2; i++) {
- EXPECT_WRITE32(AES_CTRL_SHADOWED_REG_OFFSET,
- {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, 0x01},
- {AES_CTRL_SHADOWED_MODE_OFFSET, 0x08},
- {AES_CTRL_SHADOWED_OPERATION_OFFSET, 0x1},
- {AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
- {AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
+ EXPECT_WRITE32(
+ AES_CTRL_SHADOWED_REG_OFFSET,
+ {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, kDifAesKey128},
+ {AES_CTRL_SHADOWED_MODE_OFFSET, kDifAesModeOfb},
+ {AES_CTRL_SHADOWED_OPERATION_OFFSET, kDifAesOperationEncrypt},
+ {AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
+ {AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
}
setExpectedKey(kKey_, 8);
setExpectedIv(kIv_);
- EXPECT_EQ(dif_aes_start_ofb(&aes_, &kTransaction, kKey_, kIv_), kDifOk);
+ EXPECT_EQ(dif_aes_start_ofb(&aes_, &transaction, kKey_, kIv_), kDifOk);
}
// CTR tests
-class CTRTest : public AesTestInitialized {};
+class CTRTest : public AesTestInitialized {
+ protected:
+ CTRTest() { transaction.mode = kDifAesModeCtr; }
+};
TEST_F(CTRTest, start) {
EXPECT_READ32(AES_STATUS_REG_OFFSET, 1);
for (int i = 0; i < 2; i++) {
EXPECT_WRITE32(AES_CTRL_SHADOWED_REG_OFFSET,
- {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, 0x01},
- {AES_CTRL_SHADOWED_MODE_OFFSET, 0x10},
- {AES_CTRL_SHADOWED_OPERATION_OFFSET, 0x1},
+ {{AES_CTRL_SHADOWED_KEY_LEN_OFFSET, kDifAesKey128},
+ {AES_CTRL_SHADOWED_MODE_OFFSET, kDifAesModeCtr},
+ {AES_CTRL_SHADOWED_OPERATION_OFFSET, kDifAesOperationEncrypt},
{AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, false},
{AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_BIT, false}});
}
@@ -174,7 +192,7 @@
setExpectedKey(kKey_, 8);
setExpectedIv(kIv_);
- EXPECT_EQ(dif_aes_start_ctr(&aes_, &kTransaction, kKey_, kIv_), kDifOk);
+ EXPECT_EQ(dif_aes_start_ctr(&aes_, &transaction, kKey_, kIv_), kDifOk);
}
} // namespace
