[sw/silicon_creator] Don't request a new scrambling key for ret ram
This commit adds retention_sram_init() and uses it instead of
retention_sram_scramble() to reduce boot time.
Signed-off-by: Alphan Ulusoy <alphan@google.com>
diff --git a/sw/device/silicon_creator/lib/drivers/retention_sram.c b/sw/device/silicon_creator/lib/drivers/retention_sram.c
index b5a7555..6f1125e 100644
--- a/sw/device/silicon_creator/lib/drivers/retention_sram.c
+++ b/sw/device/silicon_creator/lib/drivers/retention_sram.c
@@ -18,6 +18,21 @@
kBase = TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR,
};
+/**
+ * Check that control register writes are enabled.
+ *
+ * @return Result of the operation.
+ */
+static rom_error_t is_locked(void) {
+ if (!bitfield_bit32_read(
+ abs_mmio_read32(kBase + SRAM_CTRL_CTRL_REGWEN_REG_OFFSET),
+ SRAM_CTRL_CTRL_REGWEN_CTRL_REGWEN_BIT)) {
+ return kErrorRetSramLocked;
+ }
+
+ return kErrorOk;
+}
+
volatile retention_sram_t *retention_sram_get(void) {
static_assert(sizeof(retention_sram_t) == TOP_EARLGREY_RAM_RET_AON_SIZE_BYTES,
"Unexpected retention SRAM size.");
@@ -28,13 +43,17 @@
*retention_sram_get() = (retention_sram_t){0};
}
+rom_error_t retention_sram_init(void) {
+ RETURN_IF_ERROR(is_locked());
+
+ uint32_t reg = bitfield_bit32_write(0, SRAM_CTRL_CTRL_INIT_BIT, true);
+ abs_mmio_write32(kBase + SRAM_CTRL_CTRL_REG_OFFSET, reg);
+
+ return kErrorOk;
+}
+
rom_error_t retention_sram_scramble(void) {
- // Check that control register writes are enabled.
- if (!bitfield_bit32_read(
- abs_mmio_read32(kBase + SRAM_CTRL_CTRL_REGWEN_REG_OFFSET),
- SRAM_CTRL_CTRL_REGWEN_CTRL_REGWEN_BIT)) {
- return kErrorRetSramLocked;
- }
+ RETURN_IF_ERROR(is_locked());
// Request the renewal of the scrambling key and initialization to random
// values.
diff --git a/sw/device/silicon_creator/lib/drivers/retention_sram.h b/sw/device/silicon_creator/lib/drivers/retention_sram.h
index 460bdbb..6d1fc8c 100644
--- a/sw/device/silicon_creator/lib/drivers/retention_sram.h
+++ b/sw/device/silicon_creator/lib/drivers/retention_sram.h
@@ -79,6 +79,16 @@
void retention_sram_clear(void);
/**
+ * Initialize the retention SRAM with pseudo-random data from the LFSR.
+ *
+ * This function does not request a new scrambling key. See
+ * `retention_sram_scramble()`.
+ *
+ * @return Result of the operation.
+ */
+rom_error_t retention_sram_init(void);
+
+/**
* Start scrambling the retention SRAM.
*
* Requests a new scrambling key for the retention SRAM. This operation
diff --git a/sw/device/silicon_creator/lib/drivers/retention_sram_unittest.cc b/sw/device/silicon_creator/lib/drivers/retention_sram_unittest.cc
index a6da2fd..b4647d1 100644
--- a/sw/device/silicon_creator/lib/drivers/retention_sram_unittest.cc
+++ b/sw/device/silicon_creator/lib/drivers/retention_sram_unittest.cc
@@ -16,38 +16,52 @@
namespace {
class RetentionSramTest : public mask_rom_test::MaskRomTest {
protected:
- uint32_t base_ = TOP_EARLGREY_PINMUX_AON_BASE_ADDR;
+ uint32_t base_ = TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR;
mask_rom_test::MockAbsMmio mmio_;
};
class ScrambleTest : public RetentionSramTest {};
TEST_F(ScrambleTest, Ok) {
- uint32_t write_enabled =
- bitfield_bit32_write(0, SRAM_CTRL_CTRL_REGWEN_CTRL_REGWEN_BIT, true);
- EXPECT_ABS_READ32(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR +
- SRAM_CTRL_CTRL_REGWEN_REG_OFFSET,
- write_enabled);
-
- uint32_t ctrl = 0;
- ctrl = bitfield_bit32_write(ctrl, SRAM_CTRL_CTRL_RENEW_SCR_KEY_BIT, true);
- ctrl = bitfield_bit32_write(ctrl, SRAM_CTRL_CTRL_INIT_BIT, true);
- EXPECT_ABS_WRITE32(
- TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR + SRAM_CTRL_CTRL_REG_OFFSET,
- ctrl);
+ EXPECT_ABS_READ32(base_ + SRAM_CTRL_CTRL_REGWEN_REG_OFFSET,
+ {
+ {SRAM_CTRL_CTRL_REGWEN_CTRL_REGWEN_BIT, 1},
+ });
+ EXPECT_ABS_WRITE32(base_ + SRAM_CTRL_CTRL_REG_OFFSET,
+ {
+ {SRAM_CTRL_CTRL_RENEW_SCR_KEY_BIT, 1},
+ {SRAM_CTRL_CTRL_INIT_BIT, 1},
+ });
EXPECT_EQ(retention_sram_scramble(), kErrorOk);
}
TEST_F(ScrambleTest, Locked) {
- uint32_t write_enabled =
- bitfield_bit32_write(0, SRAM_CTRL_CTRL_REGWEN_CTRL_REGWEN_BIT, false);
- EXPECT_ABS_READ32(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR +
- SRAM_CTRL_CTRL_REGWEN_REG_OFFSET,
- write_enabled);
+ EXPECT_ABS_READ32(base_ + SRAM_CTRL_CTRL_REGWEN_REG_OFFSET, 0);
EXPECT_EQ(retention_sram_scramble(), kErrorRetSramLocked);
}
+class InitTest : public RetentionSramTest {};
+
+TEST_F(InitTest, Ok) {
+ EXPECT_ABS_READ32(base_ + SRAM_CTRL_CTRL_REGWEN_REG_OFFSET,
+ {
+ {SRAM_CTRL_CTRL_REGWEN_CTRL_REGWEN_BIT, 1},
+ });
+ EXPECT_ABS_WRITE32(base_ + SRAM_CTRL_CTRL_REG_OFFSET,
+ {
+ {SRAM_CTRL_CTRL_INIT_BIT, 1},
+ });
+
+ EXPECT_EQ(retention_sram_init(), kErrorOk);
+}
+
+TEST_F(InitTest, Locked) {
+ EXPECT_ABS_READ32(base_ + SRAM_CTRL_CTRL_REGWEN_REG_OFFSET, 0);
+
+ EXPECT_EQ(retention_sram_init(), kErrorRetSramLocked);
+}
+
} // namespace
} // namespace retention_sram_unittest
diff --git a/sw/device/silicon_creator/mask_rom/mask_rom.c b/sw/device/silicon_creator/mask_rom/mask_rom.c
index 46770b1..61ea3c8 100644
--- a/sw/device/silicon_creator/mask_rom/mask_rom.c
+++ b/sw/device/silicon_creator/mask_rom/mask_rom.c
@@ -122,7 +122,7 @@
// retention SRAM and the reset reason register cleared.
uint32_t reset_reasons = rstmgr_reason_get();
if (bitfield_bit32_read(reset_reasons, kRstmgrReasonPowerOn)) {
- retention_sram_clear();
+ retention_sram_init();
}
// If running on an FPGA, print the FPGA version-id.
