commit | 07159d5952ab29f981950c72e289846e1389a2d7 | [log] [tgz] |
---|---|---|
author | Andreas Kurth <adk@lowrisc.org> | Mon Aug 29 18:51:10 2022 +0000 |
committer | Michael Schaffner <msf@google.com> | Wed Aug 31 16:26:55 2022 -0700 |
tree | a8de0107155e600150eebbda23ab0c0c53596ddb | |
parent | 76ce9ec3a0e37046b306b23eb4a982e8e856d5fe [diff] |
[otbn,rtl] Separate wipe value of last WDR and ACC register Prior to this commit, WDR[31] and the ACC register had the same value after secure wipe (#14324). This commit fixes #14324 by extending the secure wipe by one cycle, so that WDR[31] is now wiped in the cycle before the ACC register is wiped. Signed-off-by: Andreas Kurth <adk@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING and our documentation on project organization and processes for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).