This is a FPGA utiity script which embedds the generated rom elf file into FPGA bitstream. Script assumes there is pre-generated fpga bit file in the build directory.The boot rom mem file is auto generated.
Utility script to load MEM contents into BRAM FPGA bitfile.
$ cd $REPO_TOP $ ./util/fpga/splice_nexysvideo.sh
Updated output bitfile located : at the same place as raw vivado bitfile @ build/lowrisc_systems_top_earlgrey_nexysvideo_0.1/synth-vivado/lowrisc_systems_top_earlgrey_nexysvideo_0.1.splice.bit
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