Remove double-import SV packages
Import a package only once in each SystemVerilog file. No functional
change intended.
Signed-off-by: Philipp Wagner <phw@lowrisc.org>
diff --git a/hw/ip/aes/rtl/aes_control.sv b/hw/ip/aes/rtl/aes_control.sv
index 38aa64f..9d95147 100644
--- a/hw/ip/aes/rtl/aes_control.sv
+++ b/hw/ip/aes/rtl/aes_control.sv
@@ -111,8 +111,6 @@
output logic input_ready_we_o
);
- import aes_pkg::*;
-
// Encoding generated with:
// $ ./util/design/sparse-fsm-encode.py -d 3 -m 7 -n 6 \
// -s 31468618 --language=sv
diff --git a/hw/ip/aes/rtl/aes_sbox.sv b/hw/ip/aes/rtl/aes_sbox.sv
index 92e4dd2..2ddc9b0 100644
--- a/hw/ip/aes/rtl/aes_sbox.sv
+++ b/hw/ip/aes/rtl/aes_sbox.sv
@@ -23,7 +23,6 @@
output logic [7:0] mask_o
);
- import aes_pkg::*;
localparam bit SBoxMasked = (SBoxImpl == SBoxImplCanrightMasked ||
SBoxImpl == SBoxImplCanrightMaskedNoreuse ||
SBoxImpl == SBoxImplDom) ? 1'b1 : 1'b0;
diff --git a/hw/ip/aon_timer/rtl/aon_timer.sv b/hw/ip/aon_timer/rtl/aon_timer.sv
index edc52ad..317495e 100644
--- a/hw/ip/aon_timer/rtl/aon_timer.sv
+++ b/hw/ip/aon_timer/rtl/aon_timer.sv
@@ -36,8 +36,6 @@
input logic sleep_mode_i
);
- import aon_timer_reg_pkg::*;
-
localparam int AON_WKUP = 0;
localparam int AON_WDOG = 1;
diff --git a/hw/ip/csrng/rtl/csrng.sv b/hw/ip/csrng/rtl/csrng.sv
index 4c8323b..aa3e367 100644
--- a/hw/ip/csrng/rtl/csrng.sv
+++ b/hw/ip/csrng/rtl/csrng.sv
@@ -52,9 +52,6 @@
output logic intr_cs_fatal_err_o
);
-
- import csrng_reg_pkg::*;
-
logic efuse_sw_app_enable;
assign efuse_sw_app_enable = prim_mubi_pkg::mubi8_test_true_strict(otp_en_csrng_sw_app_read_i);
diff --git a/hw/ip/edn/rtl/edn.sv b/hw/ip/edn/rtl/edn.sv
index 4f4f050..7795be9 100644
--- a/hw/ip/edn/rtl/edn.sv
+++ b/hw/ip/edn/rtl/edn.sv
@@ -39,8 +39,6 @@
output logic intr_edn_fatal_err_o
);
- import edn_reg_pkg::*;
-
edn_reg2hw_t reg2hw;
edn_hw2reg_t hw2reg;
diff --git a/hw/ip/entropy_src/rtl/entropy_src.sv b/hw/ip/entropy_src/rtl/entropy_src.sv
index 447fe6e..fd849df 100644
--- a/hw/ip/entropy_src/rtl/entropy_src.sv
+++ b/hw/ip/entropy_src/rtl/entropy_src.sv
@@ -57,8 +57,6 @@
output logic intr_es_fatal_err_o
);
- import entropy_src_reg_pkg::*;
-
// common signals
entropy_src_hw2reg_t hw2reg;
entropy_src_reg2hw_t reg2hw;
diff --git a/hw/ip/i2c/rtl/i2c.sv b/hw/ip/i2c/rtl/i2c.sv
index 8f0d084..3733490 100644
--- a/hw/ip/i2c/rtl/i2c.sv
+++ b/hw/ip/i2c/rtl/i2c.sv
@@ -49,8 +49,6 @@
output logic intr_host_timeout_o
);
- import i2c_reg_pkg::*;
-
i2c_reg2hw_t reg2hw;
i2c_hw2reg_t hw2reg;
diff --git a/hw/ip/keymgr/rtl/keymgr.sv b/hw/ip/keymgr/rtl/keymgr.sv
index 55ba03a..97b5022 100644
--- a/hw/ip/keymgr/rtl/keymgr.sv
+++ b/hw/ip/keymgr/rtl/keymgr.sv
@@ -72,8 +72,6 @@
output prim_alert_pkg::alert_tx_t [keymgr_reg_pkg::NumAlerts-1:0] alert_tx_o
);
- import keymgr_reg_pkg::*;
-
`ASSERT_INIT(AdvDataWidth_A, AdvDataWidth <= KDFMaxWidth)
`ASSERT_INIT(IdDataWidth_A, IdDataWidth <= KDFMaxWidth)
`ASSERT_INIT(GenDataWidth_A, GenDataWidth <= KDFMaxWidth)
diff --git a/hw/ip/rv_timer/rtl/rv_timer.sv b/hw/ip/rv_timer/rtl/rv_timer.sv
index 235432b..627ed36 100644
--- a/hw/ip/rv_timer/rtl/rv_timer.sv
+++ b/hw/ip/rv_timer/rtl/rv_timer.sv
@@ -22,8 +22,6 @@
output logic intr_timer_expired_hart0_timer0_o
);
- import rv_timer_reg_pkg::*;
-
rv_timer_reg2hw_t reg2hw;
rv_timer_hw2reg_t hw2reg;
diff --git a/hw/ip/spi_device/rtl/spi_fwmode.sv b/hw/ip/spi_device/rtl/spi_fwmode.sv
index 253aca7..b300570 100644
--- a/hw/ip/spi_device/rtl/spi_fwmode.sv
+++ b/hw/ip/spi_device/rtl/spi_fwmode.sv
@@ -79,8 +79,6 @@
);
- import spi_device_pkg::*;
-
/////////////
// Signals //
/////////////
diff --git a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl.sv b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl.sv
index f75af78..6b39325 100644
--- a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl.sv
+++ b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl.sv
@@ -59,8 +59,6 @@
// Alerts and CSR Node //
/////////////////////////
- import sysrst_ctrl_reg_pkg::*;
-
sysrst_ctrl_reg2hw_t reg2hw;
sysrst_ctrl_hw2reg_t hw2reg;
diff --git a/hw/ip/uart/rtl/uart.sv b/hw/ip/uart/rtl/uart.sv
index 5808523..e78495a 100644
--- a/hw/ip/uart/rtl/uart.sv
+++ b/hw/ip/uart/rtl/uart.sv
@@ -38,8 +38,6 @@
output logic intr_rx_parity_err_o
);
- import uart_reg_pkg::*;
-
logic [NumAlerts-1:0] alert_test, alerts;
uart_reg2hw_t reg2hw;
uart_hw2reg_t hw2reg;
diff --git a/hw/ip/usbdev/rtl/usbdev.sv b/hw/ip/usbdev/rtl/usbdev.sv
index e182cdf..a8866f8 100644
--- a/hw/ip/usbdev/rtl/usbdev.sv
+++ b/hw/ip/usbdev/rtl/usbdev.sv
@@ -92,8 +92,6 @@
output logic intr_frame_o
);
- import usbdev_reg_pkg::*;
-
// Could make SramDepth, MaxPktSizeByte, AVFifoDepth and RXFifoDepth
// module parameters but may need to fix register def for the first two
localparam int SramDw = 32; // Places packing bytes to SRAM assume this
