| commit | b168ae97862988234b868266993a5d8b93f9b9bf | [log] [tgz] |
|---|---|---|
| author | Greg Chadwick <gac@lowrisc.org> | Wed Apr 14 16:04:03 2021 +0100 |
| committer | Greg Chadwick <gac@lowrisc.org> | Fri Apr 16 10:50:20 2021 +0100 |
| tree | a3af98d51594c2ad0065cf67ebaf85d47afe5d86 | |
| parent | e6e8f15a8922a7f7f798574c3dc9ddc0a7e0ef95 [diff] |
[otbn] Implement RND/URND CSR/WSR and RND_PREFETCH CSR This adds logic to read RND values from the EDN, removing the test RND dummy value. A small cache to hold a single 256-bit random number from an EDN request is provided. A RND_PREFETCH CSR is introduced which prefetches to the cache when any value is written to it. Any RND read will take the value from the cache, emptying it. If a value isn't available in the cache the RND read will stall until one is available, starting a new EDN request to fetch one if required. An LFSR is added to supply values to URND. This is seeded via a request to the EDN that occurs when OTBN starts. Execution cannot proceed until the LFSR has been seeded. Two dummy EDNs are provided in `otbn_top_sim.sv`. These provides the existing test RND dummy value on every request after a fixed delay. The ISS has been altered to support the new stalling behaviour for RND reads. In a testbench the EDN interface is monitored and the ISS is provided with RND values as they appear on the interface. ISS support for URND has not yet been implemented, though it does implement the stall at the beginning of execution whilst OTBN awaits a URND reseed. Signed-off-by: Greg Chadwick <gac@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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