commit | 0298654703f8c9d7118af54c1859ce35c85fc26d | [log] [tgz] |
---|---|---|
author | Tung Hoang <hoang.tung@wdc.com> | Sat Jul 11 00:24:49 2020 -0700 |
committer | cindychip <cindy.chen0316@gmail.com> | Thu Jul 16 09:23:59 2020 -0700 |
tree | ea1365e8f4de7905f5f4fa1e0f82baf897533987 | |
parent | 0a720ef087072e3c231dd11f17379dfeffbb1324 [diff] |
[i2c, dv] Add i2c_fifo_overflow (v2) test for rx_fifo and fmt_fifo The main point of this test is to create a sequence and specific constraints that deterministicallys trigger overflow interrupts which can be predictable and verified by DV - Update i2c_testplan.hjson to replace rx_fifo_overflow and fmt_fifo_overflow tests by a unified fifo_overflow test - Add i2c_fifo_overflow_vseq to verify fmt_overflow and rx_overflow interrupt - Update i2c_scoreboard to verify dropped data due to fifo overflow - Minor refactor i2c_fifo_watermark for consistency Signed-off-by: Tung Hoang <hoang.tung@wdc.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).