| commit | 2af73a7463ea51ad4e18f954d6b6135c88a5adaf | [log] [tgz] |
|---|---|---|
| author | Timothy Chen <timothytim@google.com> | Wed Apr 21 18:14:38 2021 -0700 |
| committer | tjaychen <timothytim@google.com> | Wed Apr 21 20:33:39 2021 -0700 |
| tree | 17f8ba9a9e81f70b90b85cecb3871ad0b904f8f3 | |
| parent | ce8e393d4b2d9b9e789f6e1333a9f3fd530bdba2 [diff] |
[top] Fixes for optimized modules - The pins used for creating ast clocks were sometimes being removed during synthesis optimization. This caused a whole set of logic to not have a clock, even though the initial constraint definition was successful. - Add buffers to anchor where the constraints would go and ensure logic is not removed. Note this is only needed for open source synthesis since AST is not real Signed-off-by: Timothy Chen <timothytim@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
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