[top] Minor lint fixes
Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/top_earlgrey/data/top_earlgrey.sv.tpl b/hw/top_earlgrey/data/top_earlgrey.sv.tpl
index 39ea30f..bca5798 100644
--- a/hw/top_earlgrey/data/top_earlgrey.sv.tpl
+++ b/hw/top_earlgrey/data/top_earlgrey.sv.tpl
@@ -86,6 +86,7 @@
% endfor
% endif
input scan_rst_ni, // reset used for test mode
+ input scan_en_i,
input scanmode_i // 1 for Scan
);
@@ -498,6 +499,7 @@
.flash_test_mode_a_i,
.flash_test_voltage_h_i,
.scanmode_i,
+ .scan_en_i,
.scan_rst_ni
);
diff --git a/hw/top_earlgrey/lint/top_earlgrey.waiver b/hw/top_earlgrey/lint/top_earlgrey.waiver
index 78340ab..d608017 100644
--- a/hw/top_earlgrey/lint/top_earlgrey.waiver
+++ b/hw/top_earlgrey/lint/top_earlgrey.waiver
@@ -12,6 +12,10 @@
waive -rules RESET_MUX -location {top_earlgrey.sv} -regexp {Asynchronous reset .*rstmgr_aon_resets\.rst.* is driven by a multiplexer} \
-comment "This is dedicated reset infrastructure, and hence permissible"
+waive -rules CLOCK_MUX -location {clkmgr.sv top_earlgrey.sv} -regexp {.*clk_io_div.* is driven by a multiplexer here} \
+ -comment "Divided clocks go through prim_clock_div, which use muxes for scan bypass and clock step down"
+
+
## xbar
#waive -rules HIER_NET_NOT_READ -location {tlul_xbar.sv} -regexp {a_source.* is not read from} \
# -comment "upper bits of a_source are shifted off when going through M:1 sockets"
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
index 93ab59a..b982134 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -78,6 +78,7 @@
output clkmgr_pkg::clkmgr_ast_out_t clks_ast_o,
output rstmgr_pkg::rstmgr_ast_out_t rsts_ast_o,
input scan_rst_ni, // reset used for test mode
+ input scan_en_i,
input scanmode_i // 1 for Scan
);
@@ -871,6 +872,7 @@
.flash_test_mode_a_i,
.flash_test_voltage_h_i,
.scanmode_i,
+ .scan_en_i,
.scan_rst_ni
);
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_asic.sv b/hw/top_earlgrey/rtl/top_earlgrey_asic.sv
index 0a1a69c..e97a99c 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey_asic.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey_asic.sv
@@ -306,6 +306,7 @@
// DFT signals
.scan_rst_ni ( 1'b1 ),
+ .scan_en_i ( 1'b0 ),
.scanmode_i ( 1'b0 )
);
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_nexysvideo.sv b/hw/top_earlgrey/rtl/top_earlgrey_nexysvideo.sv
index 1f0551d..37e90c7 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey_nexysvideo.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey_nexysvideo.sv
@@ -437,6 +437,7 @@
// DFT signals
.scan_rst_ni ( 1'b1 ),
+ .scan_en_i ( 1'b0 ),
.scanmode_i ( 1'b0 )
);
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv b/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
index eaba896..f5754df 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
@@ -142,6 +142,7 @@
// DFT signals
.scan_rst_ni (1'b1),
+ .scan_en_i (1'b0),
.scanmode_i (1'b0)
);
