commit 005dbe7102087294f8b1ee56c5402a3887b3912e
author Timothy Chen <timothytim@google.com> Thu Oct 17 15:56:25 2019 -0700
committer tjaychen <timothytim@google.com> Thu Oct 17 16:20:15 2019 -0700
tree d989fbb48f3d78e4735165e8491a1391f43d21c6
parent 1a95dd9055bd894fb94682125f6e38356f996b33

[doc] Fix verilator instructions

doc/ug/getting_started_verilator.md

diff --git a/doc/ug/getting_started_verilator.md b/doc/ug/getting_started_verilator.md
index 6c6d7de..0ea8658 100644
--- a/doc/ug/getting_started_verilator.md
+++ b/doc/ug/getting_started_verilator.md
@@ -30,8 +30,8 @@
 
 ```console
 $ cd $REPO_TOP
-$ make -C sw SIM=1 SW_DIR=sw/boot_rom SW_BUILD_DIR=${ROM_BUILD_DIR} clean all
-$ make -C sw SIM=1 SW_DIR=sw/examples/hello_world SW_BUILD_DIR=${SW_BUILD_DIR} clean all
+$ make -C sw SIM=1 SW_DIR=boot_rom SW_BUILD_DIR=${ROM_BUILD_DIR} clean all
+$ make -C sw SIM=1 SW_DIR=examples/hello_world SW_BUILD_DIR=${SW_BUILD_DIR} clean all
 ```
 
 Now the simulation can be run.