Add vsrl instruction and test.
* Add softrvv implementation.
* Add sorfrvv test.
* Add v-ext test.
Change-Id: I4f4b955b4ea480065b6cf6e24679173a6429b183
diff --git a/softrvv/include/softrvv.h b/softrvv/include/softrvv.h
index 7d952bc..f8b6f91 100644
--- a/softrvv/include/softrvv.h
+++ b/softrvv/include/softrvv.h
@@ -14,6 +14,7 @@
#include "softrvv_vrem.h"
#include "softrvv_vsext_vzext.h"
#include "softrvv_vsll.h"
+#include "softrvv_vsrl.h"
#include "softrvv_vsub.h"
#include "softrvv_vwadd.h"
#include "softrvv_vwsub.h"
diff --git a/softrvv/include/softrvv_vsrl.h b/softrvv/include/softrvv_vsrl.h
new file mode 100644
index 0000000..28501b9
--- /dev/null
+++ b/softrvv/include/softrvv_vsrl.h
@@ -0,0 +1,34 @@
+#ifndef SOFTRVV_VSRL_H
+#define SOFTRVV_VSRL_H
+
+#include <stddef.h>
+
+#include <type_traits>
+
+namespace softrvv {
+
+template <typename T>
+void vsrl_vx(T *dest, T *src1, const T *src2, int32_t avl) {
+ // Only low lg2(SEW) bits are used for shift
+ const T low_bits_mask = sizeof(T) * 8 - 1;
+ const T shift = *src2 & low_bits_mask;
+ for (int32_t idx = 0; idx < avl; idx++) {
+ dest[idx] = static_cast<T>(
+ static_cast<typename std::make_unsigned<T>::type>(src1[idx]) >> shift);
+ }
+}
+
+template <typename T>
+void vsrl_vv(T *dest, T *src1, T *src2, int32_t avl) {
+ // Only low lg2(SEW) bits are used for shift
+ const T low_bits_mask = sizeof(T) * 8 - 1;
+ for (int32_t idx = 0; idx < avl; idx++) {
+ dest[idx] = static_cast<T>(
+ static_cast<typename std::make_unsigned<T>::type>(src1[idx]) >>
+ (src2[idx] & low_bits_mask));
+ }
+}
+
+} // namespace softrvv
+
+#endif // SOFTRVV_VSRL_H
diff --git a/softrvv/tests/CMakeLists.txt b/softrvv/tests/CMakeLists.txt
index b893673..0247179 100644
--- a/softrvv/tests/CMakeLists.txt
+++ b/softrvv/tests/CMakeLists.txt
@@ -170,6 +170,15 @@
-Xlinker --defsym=__itcm_length__=128K
)
+softrvv_vec_cc_generated_test(
+ NAME
+ vsrl
+ TEMPLATE
+ softrvv_vsrl_test.tpl.cpp
+ LINKOPTS
+ -Xlinker --defsym=__itcm_length__=128K
+)
+
vec_cc_test(
NAME
softrvv_vmax
diff --git a/softrvv/tests/templates/softrvv_vsrl_test.tpl.cpp b/softrvv/tests/templates/softrvv_vsrl_test.tpl.cpp
new file mode 100644
index 0000000..0a3f95f
--- /dev/null
+++ b/softrvv/tests/templates/softrvv_vsrl_test.tpl.cpp
@@ -0,0 +1,11 @@
+<%inherit file="base.tpl.cpp"/>\
+<%namespace name="tests" file="opivv_opivx_test.tpl.cpp"/>
+<%
+import numpy as np
+src1, src2, rs1 = parent.module.get_test_inputs(np.int32, N=5)
+tmp_src2 = src2 & (np.int32(0).itemsize * 8 -1)
+ref_vv = np.right_shift(src1.astype(np.uint32), tmp_src2).astype(np.int32)
+tmp_rs1 = rs1 & (np.int32(0).itemsize * 8 - 1)
+ref_vx = np.right_shift(src1.astype(np.uint32), tmp_rs1).astype(np.int32)
+%>\
+${tests.test_opivv_opivx("int32_t", op, src1, src2, rs1, ref_vv, ref_vx)}
diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
index b2d3d40..b5472c9 100644
--- a/tests/CMakeLists.txt
+++ b/tests/CMakeLists.txt
@@ -228,6 +228,15 @@
-Xlinker --defsym=__itcm_length__=192K
)
+vec_cc_generated_test(
+ NAME
+ vsrl
+ TEMPLATE
+ opivv_opivx_opivi_test.tpl.cpp
+ LINKOPTS
+ -Xlinker --defsym=__itcm_length__=192K
+)
+
vec_cc_test(
NAME
vsetvl_test
