<%inherit file="base.tpl.cpp"/>\

namespace ${op_code}_vi_test {
namespace {

using namespace test_v_helpers;

uint8_t src_vector_1[MAXVL_BYTES];
uint8_t dest_vector[MAXVL_BYTES];
uint8_t ref_dest_vector[MAXVL_BYTES];

class ${op_code.capitalize()}Test : public ::testing::Test {
 protected:
  void SetUp() override { zero_vector_registers(); }
  void TearDown() override { zero_vector_registers(); }
};
% for test_val in [-16, -15, -4, 1, 5, 12, 15]:
% for sew in [8, 16, 32]:
% for lmul in [1, 2, 4, 8]:
<%
var_type = "int%d_t" % sew
%>\

TEST_F(${op_code.capitalize()}Test, ${op_code.lower()}_vi${sew}m${lmul}simm5_${("%s" % test_val).replace('-','n')}) {
  for (int i = 0; i < AVL_COUNT; i++) {
    int32_t avl = AVLS[i];
    int vlmax;
    int vl;
    const ${var_type} test_val = ${test_val};

    std::tie(vlmax, vl) = vector_test_setup<${var_type}>(
        VLMUL::LMUL_M${lmul}, avl,
        {src_vector_1, dest_vector, ref_dest_vector});
    if (avl > vlmax) {
      continue;
    }
    ${var_type} *ptr_vec_1 = reinterpret_cast<${var_type} *>(src_vector_1);
    ${var_type} *ptr_dest_vec = reinterpret_cast<${var_type} *>(dest_vector);
    ${var_type} *ptr_ref_dest_vec = reinterpret_cast<${var_type} *>(ref_dest_vector);
    // set up values to test up to index of the AVL
    fill_random_vector<${var_type}>(ptr_vec_1, avl);
    memset(dest_vector, 0, MAXVL_BYTES);
    memset(ref_dest_vector, 0, MAXVL_BYTES);

    // Generate reference vector
    softrvv::${op_code}_vx<${var_type}>(ptr_ref_dest_vec, ptr_vec_1, &test_val, avl);

    // Load vector registers
    __asm__ volatile("vle${sew}.v v8, (%0)" : : "r"(ptr_vec_1));

    // Run target instruction
    __asm__ volatile("${op_code}.vi v24, v8, %[SIMM5]" ::[SIMM5] "n"(test_val));

    // Store result vector register
    __asm__ volatile("vse${sew}.v v24, (%0)" : : "r"(ptr_dest_vec));

    // Check vector elements
    assert_vec_elem_eq<${var_type}>(vlmax, dest_vector, ref_dest_vector);
  }
}
%endfor
%endfor
%endfor

}  // namespace
}  // namespace ${op_code}_vi_test