Add tests for "vmf{eq,ne,ge,gt,le,lt}"
1. Define reference codes (softrvv) for them
- located in "softrvv/include/"
2. Modify template files
3. Add test genreation rules for them in the CMake file
- all generated codes are tested with "m springbok && ctest --verbose -R ..."
4. Remove unnecessary header files in "softrvv/include/softrvv_vms*.h"
Change-Id: Ifa6554358e74e2e67c6e617f94ad36d293fdd2b3
diff --git a/scripts/vec_test_helpers/__init__.py b/scripts/vec_test_helpers/__init__.py
index 2268bd7..2212151 100644
--- a/scripts/vec_test_helpers/__init__.py
+++ b/scripts/vec_test_helpers/__init__.py
@@ -75,6 +75,8 @@
def is_floating(self):
"""check if a particular op_code is a floating type."""
+ if self.op_code[1] == 'm':
+ return self.op_code[2] == 'f'
return self.op_code[1] == 'f'
@property
@@ -109,9 +111,10 @@
def is_destination_mask_register(self):
"""Check if a particular op_code has a mask output."""
if self.is_floating():
- return False
- int_comparison_ops = ('vmseq', 'vmsne', 'vmsltu', 'vmsleu', 'vmsle', 'vmsgtu', 'vmsgt')
- return self.op_code in int_comparison_ops
+ comparison_ops = ('vmfeq', 'vmfle', 'vmflt', 'vmfne', 'vmfgt', 'vmfge')
+ else:
+ comparison_ops = ('vmseq', 'vmsne', 'vmsltu', 'vmsleu', 'vmsle', 'vmsgtu', 'vmsgt')
+ return self.op_code in comparison_ops
def is_unsigned(self):
"""Check if a particular op_code is a unsigned type."""
@@ -150,7 +153,14 @@
"VarTypes",
('dest_type', 'src2_type', 'src1_type', 'imm_type'))
if self.is_floating():
- var_types = VarTypes("float", "float", "float", "float")
+ """dest_type is defined as int32_t instead of float
+ to use "set_bit_in_dest_mask" (in softrvv/include/softrvv_internal.h)
+ , which has bitwise operations in it.
+ """
+ if self.is_destination_mask_register():
+ var_types = VarTypes("int32_t", "float", "float", "float")
+ else:
+ var_types = VarTypes("float", "float", "float", "float")
else:
type_fmt = "%sint%d_t"
sign_type = "u" if self.is_unsigned() or self.force_unsigned else ""
