diff --git a/scripts/vec_test_helpers/__init__.py b/scripts/vec_test_helpers/__init__.py
index 2268bd7..2212151 100644
--- a/scripts/vec_test_helpers/__init__.py
+++ b/scripts/vec_test_helpers/__init__.py
@@ -75,6 +75,8 @@
 
     def is_floating(self):
         """check if a particular op_code is a floating type."""
+        if self.op_code[1] == 'm':
+          return self.op_code[2] == 'f'
         return self.op_code[1] == 'f'
 
     @property
@@ -109,9 +111,10 @@
     def is_destination_mask_register(self):
         """Check if a particular op_code has a mask output."""
         if self.is_floating():
-            return False
-        int_comparison_ops = ('vmseq', 'vmsne', 'vmsltu', 'vmsleu', 'vmsle', 'vmsgtu', 'vmsgt')
-        return self.op_code in int_comparison_ops
+            comparison_ops = ('vmfeq', 'vmfle', 'vmflt', 'vmfne', 'vmfgt', 'vmfge')
+        else:
+            comparison_ops = ('vmseq', 'vmsne', 'vmsltu', 'vmsleu', 'vmsle', 'vmsgtu', 'vmsgt')
+        return self.op_code in comparison_ops
 
     def is_unsigned(self):
         """Check if a particular op_code is a unsigned type."""
@@ -150,7 +153,14 @@
             "VarTypes",
             ('dest_type', 'src2_type', 'src1_type', 'imm_type'))
         if self.is_floating():
-            var_types = VarTypes("float", "float", "float", "float")
+            """dest_type is defined as int32_t instead of float
+            to use "set_bit_in_dest_mask" (in softrvv/include/softrvv_internal.h)
+            , which has bitwise operations in it.
+            """
+            if self.is_destination_mask_register():
+                var_types = VarTypes("int32_t", "float", "float", "float")
+            else:
+                var_types = VarTypes("float", "float", "float", "float")
         else:
             type_fmt = "%sint%d_t"
             sign_type  = "u" if self.is_unsigned() or self.force_unsigned else ""
diff --git a/softrvv/include/softrvv.h b/softrvv/include/softrvv.h
index b4b69a2..f9b2ea5 100644
--- a/softrvv/include/softrvv.h
+++ b/softrvv/include/softrvv.h
@@ -16,6 +16,12 @@
 #include "softrvv_vfmul.h"
 #include "softrvv_vfsub.h"
 #include "softrvv_vmax.h"
+#include "softrvv_vmfeq.h"
+#include "softrvv_vmfge.h"
+#include "softrvv_vmfgt.h"
+#include "softrvv_vmfle.h"
+#include "softrvv_vmflt.h"
+#include "softrvv_vmfne.h"
 #include "softrvv_vmin.h"
 #include "softrvv_vmseq.h"
 #include "softrvv_vmsge.h"
diff --git a/softrvv/include/softrvv_vmfeq.h b/softrvv/include/softrvv_vmfeq.h
new file mode 100644
index 0000000..8885758
--- /dev/null
+++ b/softrvv/include/softrvv_vmfeq.h
@@ -0,0 +1,26 @@
+#ifndef SOFTRVV_VMFEQ_H
+#define SOFTRVV_VMFEQ_H
+
+#include <stddef.h>
+
+namespace softrvv {
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfeq_vf(int32_t *dest, float *src2, const float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] == *src1);
+  }
+}
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfeq_vv(int32_t *dest, float *src2, float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] == src1[idx]);
+  }
+}
+
+}  // namespace softrvv
+
+#endif  // SOFTRVV_VMFEQ_H
diff --git a/softrvv/include/softrvv_vmfge.h b/softrvv/include/softrvv_vmfge.h
new file mode 100644
index 0000000..9465189
--- /dev/null
+++ b/softrvv/include/softrvv_vmfge.h
@@ -0,0 +1,26 @@
+#ifndef SOFTRVV_VMFGE_H
+#define SOFTRVV_VMFGE_H
+
+#include <stddef.h>
+
+namespace softrvv {
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfge_vf(int32_t *dest, float *src2, const float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] >= *src1);
+  }
+}
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfge_vv(int32_t *dest, float *src2, float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] >= src1[idx]);
+  }
+}
+
+}  // namespace softrvv
+
+#endif  // SOFTRVV_VMFGE_H
diff --git a/softrvv/include/softrvv_vmfgt.h b/softrvv/include/softrvv_vmfgt.h
new file mode 100644
index 0000000..11bf8d5
--- /dev/null
+++ b/softrvv/include/softrvv_vmfgt.h
@@ -0,0 +1,26 @@
+#ifndef SOFTRVV_VMFGT_H
+#define SOFTRVV_VMFGT_H
+
+#include <stddef.h>
+
+namespace softrvv {
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfgt_vf(int32_t *dest, float *src2, const float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] > *src1);
+  }
+}
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfgt_vv(int32_t *dest, float *src2, float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] > src1[idx]);
+  }
+}
+
+}  // namespace softrvv
+
+#endif  // SOFTRVV_VMFGT_H
diff --git a/softrvv/include/softrvv_vmfle.h b/softrvv/include/softrvv_vmfle.h
new file mode 100644
index 0000000..70b99f6
--- /dev/null
+++ b/softrvv/include/softrvv_vmfle.h
@@ -0,0 +1,26 @@
+#ifndef SOFTRVV_VMFLE_H
+#define SOFTRVV_VMFLE_H
+
+#include <stddef.h>
+
+namespace softrvv {
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfle_vf(int32_t *dest, float *src2, const float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] <= *src1);
+  }
+}
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfle_vv(int32_t *dest, float *src2, float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] <= src1[idx]);
+  }
+}
+
+}  // namespace softrvv
+
+#endif  // SOFTRVV_VMFLE_H
diff --git a/softrvv/include/softrvv_vmflt.h b/softrvv/include/softrvv_vmflt.h
new file mode 100644
index 0000000..4231c33
--- /dev/null
+++ b/softrvv/include/softrvv_vmflt.h
@@ -0,0 +1,26 @@
+#ifndef SOFTRVV_VMFLT_H
+#define SOFTRVV_VMFLT_H
+
+#include <stddef.h>
+
+namespace softrvv {
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmflt_vf(int32_t *dest, float *src2, const float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] < *src1);
+  }
+}
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmflt_vv(int32_t *dest, float *src2, float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] < src1[idx]);
+  }
+}
+
+}  // namespace softrvv
+
+#endif  // SOFTRVV_VMFLT_H
diff --git a/softrvv/include/softrvv_vmfne.h b/softrvv/include/softrvv_vmfne.h
new file mode 100644
index 0000000..15e71c6
--- /dev/null
+++ b/softrvv/include/softrvv_vmfne.h
@@ -0,0 +1,26 @@
+#ifndef SOFTRVV_VMFNE_H
+#define SOFTRVV_VMFNE_H
+
+#include <stddef.h>
+
+namespace softrvv {
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfne_vf(int32_t *dest, float *src2, const float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] != *src1);
+  }
+}
+
+// The type of dest is defined as int32_t instead of float
+// to use "set_bit_in_dest_mask", which has bitwise operations in it.
+void vmfne_vv(int32_t *dest, float *src2, float *src1, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    set_bit_in_dest_mask<int32_t>(idx, dest, src2[idx] != src1[idx]);
+  }
+}
+
+}  // namespace softrvv
+
+#endif  // SOFTRVV_VMFNE_H
diff --git a/softrvv/include/softrvv_vmseq.h b/softrvv/include/softrvv_vmseq.h
index 05bf2f3..21de691 100644
--- a/softrvv/include/softrvv_vmseq.h
+++ b/softrvv/include/softrvv_vmseq.h
@@ -2,7 +2,6 @@
 #define SOFTRVV_VMSEQ_H
 
 #include <stddef.h>
-#include <stdint.h>
 
 namespace softrvv {
 
diff --git a/softrvv/include/softrvv_vmsge.h b/softrvv/include/softrvv_vmsge.h
index 90738ee..8e1fd6a 100644
--- a/softrvv/include/softrvv_vmsge.h
+++ b/softrvv/include/softrvv_vmsge.h
@@ -2,7 +2,6 @@
 #define SOFTRVV_VMSGE_H
 
 #include <stddef.h>
-#include <stdint.h>
 
 namespace softrvv {
 
diff --git a/softrvv/include/softrvv_vmsgt.h b/softrvv/include/softrvv_vmsgt.h
index a3e7afe..05a49b3 100644
--- a/softrvv/include/softrvv_vmsgt.h
+++ b/softrvv/include/softrvv_vmsgt.h
@@ -2,7 +2,6 @@
 #define SOFTRVV_VMSGT_H
 
 #include <stddef.h>
-#include <stdint.h>
 
 namespace softrvv {
 
diff --git a/softrvv/include/softrvv_vmsle.h b/softrvv/include/softrvv_vmsle.h
index a53c8d0..941571b 100644
--- a/softrvv/include/softrvv_vmsle.h
+++ b/softrvv/include/softrvv_vmsle.h
@@ -2,7 +2,6 @@
 #define SOFTRVV_VMSLE_H
 
 #include <stddef.h>
-#include <stdint.h>
 
 namespace softrvv {
 
diff --git a/softrvv/include/softrvv_vmslt.h b/softrvv/include/softrvv_vmslt.h
index 070c66a..17a3f70 100644
--- a/softrvv/include/softrvv_vmslt.h
+++ b/softrvv/include/softrvv_vmslt.h
@@ -2,7 +2,6 @@
 #define SOFTRVV_VMSLT_H
 
 #include <stddef.h>
-#include <stdint.h>
 
 namespace softrvv {
 
diff --git a/softrvv/include/softrvv_vmsne.h b/softrvv/include/softrvv_vmsne.h
index 68b8378..21c9e4b 100644
--- a/softrvv/include/softrvv_vmsne.h
+++ b/softrvv/include/softrvv_vmsne.h
@@ -2,7 +2,6 @@
 #define SOFTRVV_VMSNE_H
 
 #include <stddef.h>
-#include <stdint.h>
 
 namespace softrvv {
 
diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
index 334ea7c..4214281 100644
--- a/tests/CMakeLists.txt
+++ b/tests/CMakeLists.txt
@@ -73,6 +73,60 @@
 
 vec_cc_generated_test(
   NAME
+    vmfeq
+  TEMPLATE
+    opivv_opivf_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
+vec_cc_generated_test(
+  NAME
+    vmfge
+  TEMPLATE
+    opivv_opivf_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
+vec_cc_generated_test(
+  NAME
+    vmfgt
+  TEMPLATE
+    opivv_opivf_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
+vec_cc_generated_test(
+  NAME
+    vmfle
+  TEMPLATE
+    opivv_opivf_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
+vec_cc_generated_test(
+  NAME
+    vmflt
+  TEMPLATE
+    opivv_opivf_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
+vec_cc_generated_test(
+  NAME
+    vmfne
+  TEMPLATE
+    opivv_opivf_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
+vec_cc_generated_test(
+  NAME
     vsub
   TEMPLATE
     opivv_opivx_test.tpl.cpp
diff --git a/tests/templates/base_opivf_test.tpl.cpp b/tests/templates/base_opivf_test.tpl.cpp
index c3e7f09..f11a40d 100644
--- a/tests/templates/base_opivf_test.tpl.cpp
+++ b/tests/templates/base_opivf_test.tpl.cpp
@@ -7,20 +7,21 @@
 
 using namespace test_v_helpers;
 
-float src_vector_2[MAXVL_BYTES];
-float dest_vector[MAXVL_BYTES];
-float ref_dest_vector[MAXVL_BYTES];
+uint8_t src_vector_2[MAXVL_BYTES];
+uint8_t dest_vector[MAXVL_BYTES];
+uint8_t ref_dest_vector[MAXVL_BYTES];
+
+<%
+template_helper = vec_test_helpers.VecTemplateHelper(op_code)
+sews = template_helper.get_sews()
+lmuls = template_helper.get_lmuls()
+%>\
 
 class ${op_code.capitalize()}Test : public ::testing::Test {
  protected:
   void SetUp() override { zero_vector_registers(); }
   void TearDown() override { zero_vector_registers(); }
 };
-<%
-template_helper = vec_test_helpers.VecTemplateHelper(op_code)
-sews = template_helper.get_sews()
-lmuls = template_helper.get_lmuls()
-%>\
 % for sew in sews:
 % for lmul in lmuls:
 <%
diff --git a/tests/templates/base_opivv_test.tpl.cpp b/tests/templates/base_opivv_test.tpl.cpp
index 9acb8a7..13bfdae 100644
--- a/tests/templates/base_opivv_test.tpl.cpp
+++ b/tests/templates/base_opivv_test.tpl.cpp
@@ -7,24 +7,16 @@
 
 using namespace test_v_helpers;
 
+uint8_t src_vector_1[MAXVL_BYTES];
+uint8_t src_vector_2[MAXVL_BYTES];
+uint8_t dest_vector[MAXVL_BYTES];
+uint8_t ref_dest_vector[MAXVL_BYTES];
+
 <%
 template_helper = vec_test_helpers.VecTemplateHelper(op_code)
 sews = template_helper.get_sews()
 lmuls = template_helper.get_lmuls()
 %>\
-
-% if template_helper.is_floating():
-  float src_vector_1[MAXVL_BYTES];
-  float src_vector_2[MAXVL_BYTES];
-  float dest_vector[MAXVL_BYTES];
-  float ref_dest_vector[MAXVL_BYTES];
-% else:
-  uint8_t src_vector_1[MAXVL_BYTES];
-  uint8_t src_vector_2[MAXVL_BYTES];
-  uint8_t dest_vector[MAXVL_BYTES];
-  uint8_t ref_dest_vector[MAXVL_BYTES];
-% endif
-
 class ${op_code.capitalize()}Test : public ::testing::Test {
  protected:
   void SetUp() override { zero_vector_registers(); }