| // Copyright 2023 Google LLC |
| // |
| // Licensed under the Apache License, Version 2.0 (the "License"); |
| // you may not use this file except in compliance with the License. |
| // You may obtain a copy of the License at |
| // |
| // http://www.apache.org/licenses/LICENSE-2.0 |
| // |
| // Unless required by applicable law or agreed to in writing, software |
| // distributed under the License is distributed on an "AS IS" BASIS, |
| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| // See the License for the specific language governing permissions and |
| // limitations under the License. |
| |
| <%def name="test_vxunary0(op_code)"> |
| namespace ${op_code}_test { |
| namespace { |
| |
| using namespace test_v_helpers; |
| |
| uint8_t src_vector_1[MAXVL_BYTES]; |
| uint8_t dest_vector[MAXVL_BYTES]; |
| uint8_t ref_dest_vector[MAXVL_BYTES]; |
| |
| class ${op_code.capitalize()}Test : public ::testing::Test { |
| protected: |
| void SetUp() override { zero_vector_registers(); } |
| void TearDown() override { zero_vector_registers(); } |
| }; |
| % for fraction, sew in [(4, 32), (2, 16)]: |
| % for lmul in [1, 2, 4, 8]: |
| <% |
| sign_type = "u" if "z" in op_code else "" |
| src_type = "%sint%d_t" % (sign_type, sew/fraction) |
| dest_type = "%sint%d_t" % (sign_type, sew) |
| %>\ |
| TEST_F(${op_code.capitalize()}Test, VF${fraction}e${sew}m${lmul}) { |
| for (int i = 0; i < AVL_COUNT; i++) { |
| int32_t avl = AVLS[i]; |
| int vlmax; |
| int vl; |
| std::tie(vlmax, vl) = vector_test_setup<${dest_type}>( |
| VLMUL::LMUL_M${lmul}, avl, |
| {src_vector_1, dest_vector, ref_dest_vector}); |
| if (avl > vlmax) { |
| continue; |
| } |
| ${src_type} *ptr_vec_1 = reinterpret_cast<${src_type} *>(src_vector_1); |
| ${dest_type} *ptr_dest_vec = reinterpret_cast<${dest_type} *>(dest_vector); |
| ${dest_type} *ptr_ref_dest_vec = reinterpret_cast<${dest_type} *>(ref_dest_vector); |
| fill_random_vector<${src_type}>(ptr_vec_1, avl); |
| memset(dest_vector, 0, sizeof(dest_vector)); |
| memset(ref_dest_vector, 0, sizeof(ref_dest_vector)); |
| softrvv::${op_code}_v<${dest_type}, ${src_type}>(ptr_ref_dest_vec, ptr_vec_1, avl); |
| // Load vector registers |
| __asm__ volatile("vle${sew//fraction}.v v8, (%0)" : : "r"(ptr_vec_1)); |
| |
| // Run target instruction |
| __asm__ volatile("${op_code}.vf${fraction} v24, v8" ::); |
| |
| // Store result vector register |
| __asm__ volatile("vse${sew}.v v24, (%0)" : : "r"(ptr_dest_vec)); |
| // Check vector elements |
| assert_vec_elem_eq<${dest_type}>(vlmax, dest_vector, ref_dest_vector); |
| } |
| } |
| %endfor |
| %endfor |
| } // namespace |
| } // namespace ${op_code}_test |
| </%def> |
| |
| |