diff --git a/softrvv/include/softrvv.h b/softrvv/include/softrvv.h
index 596341f..d779c8e 100644
--- a/softrvv/include/softrvv.h
+++ b/softrvv/include/softrvv.h
@@ -5,6 +5,7 @@
 
 #include "encoding.h"
 #include "softrvv_vadd.h"
+#include "softrvv_vdiv.h"
 #include "softrvv_vmin.h"
 #include "softrvv_vmul_vmulh.h"
 #include "softrvv_vsext_vzext.h"
diff --git a/softrvv/include/softrvv_vdiv.h b/softrvv/include/softrvv_vdiv.h
new file mode 100644
index 0000000..067308e
--- /dev/null
+++ b/softrvv/include/softrvv_vdiv.h
@@ -0,0 +1,24 @@
+#ifndef SOFTRVV_VDIV_H
+#define SOFTRVV_VDIV_H
+
+#include <stddef.h>
+
+namespace softrvv {
+
+template <typename T>
+void vdiv_vx(T *dest, T *src1, const T *src2, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    dest[idx] = src1[idx] / *src2;
+  }
+}
+
+template <typename T>
+void vdiv_vv(T *dest, T *src1, T *src2, int32_t avl) {
+  for (int32_t idx = 0; idx < avl; idx++) {
+    dest[idx] = src1[idx] / src2[idx];
+  }
+}
+
+}  // namespace softrvv
+
+#endif  // SOFTRVV_VDIV_H
diff --git a/softrvv/tests/CMakeLists.txt b/softrvv/tests/CMakeLists.txt
index 0638773..59f7d21 100644
--- a/softrvv/tests/CMakeLists.txt
+++ b/softrvv/tests/CMakeLists.txt
@@ -126,3 +126,12 @@
   LINKOPTS
    -Xlinker --defsym=__itcm_length__=128K
 )
+
+softrvv_vec_cc_generated_test(
+  NAME
+    vdiv
+  TEMPLATE
+    softrvv_vdiv_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
diff --git a/softrvv/tests/templates/softrvv_vdiv_test.tpl.cpp b/softrvv/tests/templates/softrvv_vdiv_test.tpl.cpp
new file mode 100644
index 0000000..d574f5a
--- /dev/null
+++ b/softrvv/tests/templates/softrvv_vdiv_test.tpl.cpp
@@ -0,0 +1,25 @@
+<%inherit file="base.tpl.cpp"/>\
+<%namespace name="tests" file="opivv_opivx_test.tpl.cpp"/>
+<%
+import numpy as np
+# Generate test vectors using python
+N = 5
+ii32 = np.iinfo(np.int32)
+src1_data =  np.random.random_integers(ii32.min, ii32.max, N).astype(np.int32)
+src2_data = np.random.random_integers(ii32.min, ii32.max, N).astype(np.int32)
+# Don't allow divide by zero
+src2_data[src2_data==0] = 1
+ref_vv_data = np.divide(src1_data,src2_data).astype(np.int32)
+rs1 = np.int32(np.random.randint(ii32.min, ii32.max))
+# Don't allow divide by zero
+if rs1 == 0:
+  rs1 = 1
+ref_vx_data = np.divide(src1_data, rs1).astype(np.int32)
+
+# Convert test vectors to strings for array initialization
+src1 = parent.module.to_carr_str(src1_data)
+src2 = parent.module.to_carr_str(src2_data)
+ref_vv = parent.module.to_carr_str(ref_vv_data)
+ref_vx = parent.module.to_carr_str(ref_vx_data)
+%>\
+${tests.test_opivv_opivx("int32_t", op, src1, src2, rs1, ref_vv, ref_vx)}
diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
index effcafe..4e001f1 100644
--- a/tests/CMakeLists.txt
+++ b/tests/CMakeLists.txt
@@ -94,6 +94,26 @@
 
 vec_cc_generated_test(
   NAME
+    vdiv
+  OPFMT
+    OPIVV
+    OPIVX
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
+vec_cc_generated_test(
+  NAME
+    vdivu
+  OPFMT
+    OPIVV
+    OPIVX
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
+vec_cc_generated_test(
+  NAME
     vwadd
   OPFMT
     OPIVV