diff --git a/scripts/vec_test_helpers/__init__.py b/scripts/vec_test_helpers/__init__.py
index 58bf125..10511f8 100644
--- a/scripts/vec_test_helpers/__init__.py
+++ b/scripts/vec_test_helpers/__init__.py
@@ -39,7 +39,7 @@
 
 def get_imms(op_code):
     """Return a list of valid immediate values for a op code."""
-    if op_code in ['vsll', 'vsrl']:
+    if op_code in ['vsll', 'vsrl', 'vsra']:
         # Left and right shift immediates must be [0,31]
         return np.linspace(0, 31, 8, dtype=np.int32)
     else:
diff --git a/softrvv/include/softrvv.h b/softrvv/include/softrvv.h
index f8b6f91..189934b 100644
--- a/softrvv/include/softrvv.h
+++ b/softrvv/include/softrvv.h
@@ -13,6 +13,7 @@
 #include "softrvv_vor.h"
 #include "softrvv_vrem.h"
 #include "softrvv_vsext_vzext.h"
+#include "softrvv_vsra.h"
 #include "softrvv_vsll.h"
 #include "softrvv_vsrl.h"
 #include "softrvv_vsub.h"
diff --git a/softrvv/include/softrvv_vsra.h b/softrvv/include/softrvv_vsra.h
new file mode 100644
index 0000000..c759279
--- /dev/null
+++ b/softrvv/include/softrvv_vsra.h
@@ -0,0 +1,29 @@
+#ifndef SOFTRVV_VSRA_H
+#define SOFTRVV_VSRA_H
+
+#include <stddef.h>
+
+namespace softrvv {
+
+template <typename T>
+void vsra_vx(T *dest, T *src1, const T *src2, int32_t avl) {
+  // Only low lg2(SEW) bits are used for shift
+  const T low_bits_mask = sizeof(T) * 8 - 1;
+  const T shift = *src2 & low_bits_mask;
+  for (int32_t idx = 0; idx < avl; idx++) {
+    dest[idx] = src1[idx] >> shift;
+  }
+}
+
+template <typename T>
+void vsra_vv(T *dest, T *src1, T *src2, int32_t avl) {
+  // Only low lg2(SEW) bits are used for shift
+  const T low_bits_mask = sizeof(T) * 8 - 1;
+  for (int32_t idx = 0; idx < avl; idx++) {
+    dest[idx] = src1[idx] >> (src2[idx] & low_bits_mask);
+  }
+}
+
+}  // namespace softrvv
+
+#endif  // SOFTRVV_VSRA_H
diff --git a/softrvv/tests/CMakeLists.txt b/softrvv/tests/CMakeLists.txt
index 0247179..6f846d5 100644
--- a/softrvv/tests/CMakeLists.txt
+++ b/softrvv/tests/CMakeLists.txt
@@ -179,6 +179,15 @@
    -Xlinker --defsym=__itcm_length__=128K
 )
 
+softrvv_vec_cc_generated_test(
+  NAME
+    vsra
+  TEMPLATE
+    softrvv_vsra_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=128K
+)
+
 vec_cc_test(
   NAME
     softrvv_vmax
diff --git a/softrvv/tests/templates/softrvv_vsra_test.tpl.cpp b/softrvv/tests/templates/softrvv_vsra_test.tpl.cpp
new file mode 100644
index 0000000..45ef61d
--- /dev/null
+++ b/softrvv/tests/templates/softrvv_vsra_test.tpl.cpp
@@ -0,0 +1,11 @@
+<%inherit file="base.tpl.cpp"/>\
+<%namespace name="tests" file="opivv_opivx_test.tpl.cpp"/>
+<%
+import numpy as np
+src1, src2, rs1 = parent.module.get_test_inputs(np.int32, N=5)
+tmp_src2 = src2 & (np.int32(0).itemsize * 8 -1)
+ref_vv = np.right_shift(src1, tmp_src2)
+tmp_rs1 = rs1 & (np.int32(0).itemsize * 8 - 1)
+ref_vx = np.right_shift(src1, tmp_rs1)
+%>\
+${tests.test_opivv_opivx("int32_t", op, src1, src2, rs1, ref_vv, ref_vx)}
diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
index b5472c9..4a8ed75 100644
--- a/tests/CMakeLists.txt
+++ b/tests/CMakeLists.txt
@@ -237,6 +237,15 @@
    -Xlinker --defsym=__itcm_length__=192K
 )
 
+vec_cc_generated_test(
+  NAME
+    vsra
+  TEMPLATE
+    opivv_opivx_opivi_test.tpl.cpp
+  LINKOPTS
+   -Xlinker --defsym=__itcm_length__=192K
+)
+
 vec_cc_test(
   NAME
     vsetvl_test