| //! Global configuration settings and constants that are shared between the |
| //! Matcha app and platform. |
| |
| #![no_std] |
| |
| pub const CHIP_NAME: &str = "Nexus"; |
| pub const CHIP_CPU_FREQ: u32 = 10_000_000; |
| pub const CHIP_PERIPH_FREQ: u32 = 2_500_000; |
| |
| // TODO(aappleby): Shared capsule/command numbers can't go in matcha_capsule |
| // right now due to some sort of toolchain mismatch that we need to figure out |
| // later. |
| |
| pub const CAPSULE_ALARM: usize = 0x00000; |
| pub const CAPSULE_CONSOLE: usize = 0x00001; |
| pub const CAPSULE_LLDB: usize = 0x00008; |
| pub const CAPSULE_DPRINTF: usize = 0x00009; |
| pub const CAPSULE_STORAGE: usize = 0x50003; |
| pub const CAPSULE_ELFLOADER: usize = 0x50004; |
| pub const CAPSULE_MAILBOX: usize = 0x50005; |
| pub const CAPSULE_SPIFLASH: usize = 0x50006; |
| |
| pub const CMD_MAILBOX_INIT: usize = 1; |
| pub const CMD_MAILBOX_SEND: usize = 2; |
| pub const CMD_MAILBOX_RECV: usize = 3; |
| pub const CMD_MAILBOX_SEND_PAGE: usize = 4; |
| pub const CMD_MAILBOX_RECV_PAGE: usize = 5; |
| |
| pub const CMD_ELFLOADER_BOOT_SEL4: usize = 10; |
| pub const CMD_DPRINTF_PRINT: usize = 0; |
| |
| pub const IRQ_UART0_TX_WATERMARK: u32 = 1; // kTopMatchaPlicIrqIdUart0TxWatermark @ top_matcha.h |
| pub const IRQ_UART0_RX_PARITY_ERR: u32 = 8; // kTopMatchaPlicIrqIdUart0RxParityErr @ top_matcha.h |
| |
| pub const PLIC_BASE: u32 = 0x48000000; // TOP_MATCHA_RV_PLIC_BASE_ADDR |
| |
| pub const MAILBOX_BASE: u32 = 0x40800000; // TOP_MATCHA_MAILBOX_SEC_BASE_ADDR |
| pub const MAILBOX_WTIRQ: u32 = 187; // kTopMatchaPlicIrqIdMailboxSecWtirq |
| pub const MAILBOX_RTIRQ: u32 = 188; // kTopMatchaPlicIrqIdMailboxSecRtirq |
| pub const MAILBOX_EIRQ: u32 = 189; // kTopMatchaPlicIrqIdMailboxSecEirq |
| |
| pub const RV_CORE_IBEX_SEC_CFG_BASE_ADDRESS: u32 = 0x411F_0000; // TOP_MATCHA_RV_CORE_IBEX_SEC_CFG_BASE_ADDRESS |
| |
| pub const SMC_CTRL_BASE_ADDRESS: u32 = 0x5402_0000; // TOP_MATCHA_SMC_CTRL_BASE_ADDR |
| |
| pub const SPI_HOST0_BASE_ADDRESS: u32 = 0x4030_0000; // TOP_MATCHA_SPI_HOST0_BASE_ADDR |
| pub const SPI_HOST0_SPI_EVENT_IRQ: u32 = 132; // kTopMatchaPlicIrqIdSpiHost0SpiEvent |
| |
| pub const UART0_BASE_ADDRESS: u32 = 0x40000000; // TOP_MATCHA_UART0_BASE_ADDR |
| pub const UART0_BAUDRATE: u32 = 115200; |