robot tests: Rework the scripts to group common bits
Prelude to more refactoring and getting this whole
set of robot tests running on FPGA in CI.
- Adjust FPGA header file to include quiesce delay.
- Adjust fpga_test.sh to copy the whole tests dir.
- Put variables into variables/ as python modules
and depend on environment variables for ROOTDIR and
PLATFORM.
- Move common keywords into resources/common.resource.
- Adjust variable names like UART5 to more sensible
names.
- Adjust ML test to use a variable for the model name.
- Remove tarball reconstruction script from
shodan_boot.robot since we don't actually need that
for testing in renode.
Change-Id: I53aa03a353d83b6f51ff3c615df5015e47fd18f6
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..0c0614d
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,4 @@
+__pycache__
+log.html
+output.xml
+report.html
diff --git a/FPGALibrary.py b/FPGALibrary.py
index 4765a17..8e8f1a9 100644
--- a/FPGALibrary.py
+++ b/FPGALibrary.py
@@ -31,6 +31,7 @@
Throws an AssertionError if it could not open the given device.
"""
+ info(f"OpenSerialPort(dev={device}, baud={baudrate}, timeout={timeout}, wrtimeout={write_timeout}")
ser = serial.Serial(port=device,
timeout=timeout,
write_timeout=write_timeout,
@@ -178,8 +179,10 @@
port: serial.Serial instance. The port to wait for data from.
s: string. The string to look for on the port.
"""
+ if not port.is_open:
+ raise AssertionError(f"Port [{port}] not open!")
result = port.read_until(expected=s.encode('utf-8')).decode()
- info(f"_wait_for_string_on_uart read: [{result}]")
+ info(f"_wait_for_string_on_uart read: [{result}]({len(result)})")
# Short read likely resulting from a timeout.
if len(result) < len(s):
diff --git a/fpga_header.robot b/fpga_header.robot
index ab1c2c4..270099a 100644
--- a/fpga_header.robot
+++ b/fpga_header.robot
@@ -16,5 +16,6 @@
# These variables are defined in the individual robot tests this script is
# prepended to, and otherwise via command line arguments to the robot test
# framework.
-Library FPGALibrary.py board_id=${FPGA_BOARD_ID} timeout=${FPGA_UART_TIMEOUT}
+Variables variables/common_fpga.py
+Library FPGALibrary.py board_id=${FPGA_BOARD_ID} timeout=${LOG_TIMEOUT} quiesce_delay_seconds=${FPGA_QUIESCE_DELAY_SECONDS}
diff --git a/fpga_test.sh b/fpga_test.sh
index 3a3b3ef..f7bc751 100755
--- a/fpga_test.sh
+++ b/fpga_test.sh
@@ -51,15 +51,19 @@
exit 1
}
-function cleanup {
- rm -f "${TMP_TEST_SUITE}"
-}
-
ROBOT=$(which robot)
-FPGA_HEADER="${ROOTDIR}/sim/tests/fpga_header.robot"
+TESTS_ROOT="${ROOTDIR}/sim/tests"
+FPGA_HEADER="${TESTS_ROOT}/fpga_header.robot"
+
+export PLATFORM="nexus"
ARGS=()
+if [[ "$1" == "--platform" ]]; then
+ shift
+ export PLATFORM="$1"
+fi
+
if [[ "$1" == "--no-echo-check" ]]; then
shift
ARGS+=(--variable "WAIT_ECHO:false")
@@ -67,7 +71,7 @@
if [[ "$1" == "--timeout" ]]; then
shift
- ARGS+=(--variable "FPGA_UART_TIMEOUT:$1")
+ ARGS+=(--variable "LOG_TIMEOUT:$1")
shift
fi
@@ -97,10 +101,11 @@
die "Unknown argument $1"
fi
-trap cleanup EXIT
-TMP_TEST_SUITE=$(mktemp /tmp/test_suite.robot.XXXXXX)
-
-cat "${FPGA_HEADER}" "${TEST_SUITE}" > "${TMP_TEST_SUITE}"
-echo "${ROBOT}" "${ARGS[@]}" "${TMP_TEST_SUITE}"
-"${ROBOT}" "${ARGS[@]}" "${TMP_TEST_SUITE}" || exit 1
+TARGETDIR="${ROOTDIR}/out/fpga/${PLATFORM}"
+mkdir -p "${TARGETDIR}"
+cp -r "${TESTS_ROOT}"/* "${TARGETDIR}"
+cat "${FPGA_HEADER}" "${TEST_SUITE}" > "${TARGETDIR}"/tests.robot
+pushd "${TARGETDIR}"
+echo "${ROBOT}" "${ARGS[@]}" tests.robot
+"${ROBOT}" "${ARGS[@]}" tests.robot || exit 1
diff --git a/resources/common.resource b/resources/common.resource
new file mode 100644
index 0000000..2d04cab
--- /dev/null
+++ b/resources/common.resource
@@ -0,0 +1,36 @@
+*** Keywords ***
+Prepare Machine
+ Execute Command path set @${ROOTDIR}
+ Execute Command $tar=@${FLASH_TAR}
+ Execute Command $cpio=@${CPIO}
+ Execute Command $kernel=@${CANTRIP_KERNEL}
+ Execute Command $repl_file=@sim/config/platforms/${PLATFORM}-${BUILD_TYPE}.repl
+ Execute Command $sc_bin=@${CANTRIP_OUTDIR}/tmp/matcha-tock-bundle.bin
+ Set Default Uart Timeout 20
+ Create Log Tester ${LOG_TIMEOUT}
+ Execute Script ${SCRIPT}
+ Execute Command showAnalyzer "smc-uart-analyzer" ${SMC_UART} Antmicro.Renode.Analyzers.LoggingUartAnalyzer
+ # Add SMC_UART virtual time so we can check the machine execution time
+ Execute Command smc-uart-analyzer TimestampFormat Virtual
+ Execute Command cpu0 IsHalted false
+
+Install App
+ [Arguments] ${app}
+ # UART analyzer is marked as transient so it needs to be set up at subtest.
+ Execute Command showAnalyzer "smc-uart-analyzer" ${SMC_UART} Antmicro.Renode.Analyzers.LoggingUartAnalyzer
+ # Disable uart5 timestamp diff
+ Execute Command smc-uart-analyzer TimestampFormat None
+ Write Line To Uart start ${app} waitForEcho=${WAIT_ECHO}
+ # NB: don't 'Wait For Line On Uart Bundle "${app}" started' as this races
+ # against the app-generated output that is waited for below
+
+Uninstall App
+ [Arguments] ${app}
+ Write Line To Uart stop ${app} waitForEcho=${WAIT_ECHO}
+ Wait For Line On Uart Bundle "${app}" stopped
+
+Stop App
+ [Arguments] ${app}
+ Write Line To Uart stop ${app}
+ Wait For Line On Uart Bundle "${app}" stopped
+
diff --git a/shodan_boot.robot b/shodan_boot.robot
index ce9cee9..1290126 100644
--- a/shodan_boot.robot
+++ b/shodan_boot.robot
@@ -15,123 +15,20 @@
*** Comments ***
Tests for shodan system from bootup to running apps.
-*** Variables ***
-# This variable is set to be 0 by default, and should be override in CLI to test debug
-# sim/tests/test.sh --debug sim/tests/shodan_boot.robot
-${RUN_DEBUG} 0
-
-# This variable is set to be 0 for renode tests, and should be
-# overridden on CLI to test on the FPGA. Ie:
-# sim/tests/test.sh --fpga 02 sim/tests/shodan_boot.robot
-${FPGA_BOARD_ID} 0
-
-${WAIT_ECHO} true
-${LOG_TIMEOUT} 2
-${DEBUG_LOG_TIMEOUT} 10
-${FPGA_UART_TIMEOUT} 60
-${ROOTDIR} ${CURDIR}/../..
-${SCRIPT} sim/config/shodan.resc
-${PROMPT} CANTRIP>
-${UART5} sysbus.uart5
-
-${OUT_TMP} ${ROOTDIR}/out/tmp
-
-${MATCHA_BUNDLE_RELEASE} ${ROOTDIR}/out/matcha-bundle-release.elf
-${CANTRIP_KERNEL_RELEASE} ${ROOTDIR}/out/cantrip/shodan/release/kernel/kernel.elf
-${CANTRIP_ROOTSERVER_RELEASE} ${ROOTDIR}/out/cantrip/shodan/release/capdl-loader
-${FLASH_RELEASE_TAR} out/cantrip/shodan/release/ext_flash.tar
-${CPIO_RELEASE} out/cantrip/shodan/release/ext_builtins.cpio
-
-${MATCHA_BUNDLE_DEBUG} ${ROOTDIR}/out/matcha-bundle-debug.elf
-${CANTRIP_KERNEL_DEBUG} ${ROOTDIR}/out/cantrip/shodan/debug/kernel/kernel.elf
-${CANTRIP_ROOTSERVER_DEBUG} ${ROOTDIR}/out/cantrip/shodan/debug/capdl-loader
-${FLASH_DEBUG_TAR} out/cantrip/shodan/debug/ext_flash.tar
-${CPIO_DEBUG} out/cantrip/shodan/debug/ext_builtins.cpio
-
-*** Keywords ***
-Prepare Machine
- Execute Command path set @${ROOTDIR}
- IF ${RUN_DEBUG} == 1
- Execute Command $tar=@${FLASH_DEBUG_TAR}
- Execute Command $cpio=@${CPIO_DEBUG}
- Execute Command $kernel=@${CANTRIP_KERNEL_DEBUG}
- Execute Command $repl_file=@sim/config/platforms/shodan-debug.repl
- Set Default Uart Timeout 20
- Create Log Tester ${DEBUG_LOG_TIMEOUT}
- ELSE
- Execute Command $tar=@${FLASH_RELEASE_TAR}
- Execute Command $cpio=@${CPIO_RELEASE}
- Execute Command $kernel=@${CANTRIP_KERNEL_RELEASE}
- Set Default Uart Timeout 10
- Create Log Tester ${LOG_TIMEOUT}
- END
- Execute Command $sc_bin=@${OUT_TMP}/matcha-tock-bundle.bin
- Execute Script ${SCRIPT}
- # Add UART5 virtual time so we can check the machine execution time
- Execute Command uart5-analyzer TimestampFormat Virtual
- Execute Command cpu0 IsHalted false
-
-Install App
- [Arguments] ${app}
- # UART analyzer is marked as transient so it needs to be set up at subtest.
- Execute Command showAnalyzer "uart5-analyzer" ${UART5} Antmicro.Renode.Analyzers.LoggingUartAnalyzer
- # Disable uart5 timestamp diff
- Execute Command uart5-analyzer TimestampFormat None
- Write Line To Uart start ${app} waitForEcho=${WAIT_ECHO}
- # NB: don't 'Wait For Line On Uart Bundle "${app}" started' as this races
- # against the app-generated output that is waited for below
-
-Uninstall App
- [Arguments] ${app}
- Write Line To Uart stop ${app} waitForEcho=${WAIT_ECHO}
- Wait For Line On Uart Bundle "${app}" stopped
+*** Settings ***
+Resource resources/common.resource
+Variables variables/common.py
+Variables variables/${PLATFORM}_${BUILD_TYPE}.py
*** Test Cases ***
-Prepare Flash Tarball
- Run Process mkdir -p ${OUT_TMP}
-
- IF ${RUN_DEBUG} == 1
- Run Process cp -f ${MATCHA_BUNDLE_DEBUG} ${OUT_TMP}/matcha-tock-bundle-debug
- Run Process riscv32-unknown-elf-strip ${OUT_TMP}/matcha-tock-bundle-debug
- Run Process riscv32-unknown-elf-objcopy -O binary -g ${OUT_TMP}/matcha-tock-bundle-debug ${OUT_TMP}/matcha-tock-bundle.bin
- Run Process ln -sfr ${CANTRIP_KERNEL_DEBUG} ${OUT_TMP}/kernel
- Run Process ln -sfr ${CANTRIP_ROOTSERVER_DEBUG} ${OUT_TMP}/capdl-loader
- Run Process tar -C ${OUT_TMP} -cvhf ${ROOTDIR}/${FLASH_DEBUG_TAR} matcha-tock-bundle.bin kernel capdl-loader
- ELSE
- Run Process cp -f ${MATCHA_BUNDLE_RELEASE} ${OUT_TMP}/matcha-tock-bundle-release
- Run Process riscv32-unknown-elf-strip ${OUT_TMP}/matcha-tock-bundle-release
- Run Process riscv32-unknown-elf-objcopy -O binary -g ${OUT_TMP}/matcha-tock-bundle-release ${OUT_TMP}/matcha-tock-bundle.bin
- Run Process ln -sfr ${CANTRIP_KERNEL_RELEASE} ${OUT_TMP}/kernel
- Run Process ln -sfr ${CANTRIP_ROOTSERVER_RELEASE} ${OUT_TMP}/capdl-loader
- Run Process tar -C ${OUT_TMP} -cvhf ${ROOTDIR}/${FLASH_RELEASE_TAR} matcha-tock-bundle.bin kernel capdl-loader
- END
- Provides flash-tarball
-
-
-Test Shodan Boot
- Requires flash-tarball
+Test Boot
Prepare Machine
Start Emulation
- Create Terminal Tester ${UART5}
+ Create Terminal Tester ${SMC_UART}
Wait For Prompt On Uart EOF
# The following commented lines would cause the test failed to be saved.
Provides shodan-bootup
-# Test Smoke Test
-# Requires shodan-bootup
-# # UART analyzer is marked as transient so it needs to be set up at subtest.
-# Execute Command showAnalyzer "uart5-analyzer" ${UART5} Antmicro.Renode.Analyzers.LoggingUartAnalyzer
-# # Add UART5 virtual time so we can check the machine execution time
-# Execute Command uart5-analyzer TimestampFormat Virtual
-# IF ${RUN_DEBUG} == 1
-# Write Line to Uart test_mlexecute anything mobilenet_v1_emitc_static waitForEcho=${WAIT_ECHO}
-# Wait For LogEntry "main returned: ", 0
-
-# # Test timer
-# Write Line To Uart test_timer_blocking 10
-# Wait For LogEntry Timer completed.
-# END
-
Test C hello app (no SDK)
Requires shodan-bootup
Install App hello
@@ -194,20 +91,18 @@
Test SDK + MlCoordinator (oneshot & periodic)
Requires shodan-bootup
# UART analyzer is marked as transient so it needs to be set up at subtest.
- Execute Command showAnalyzer "uart5-analyzer" ${UART5} Antmicro.Renode.Analyzers.LoggingUartAnalyzer
- # Add UART5 virtual time so we can check the machine execution time
- Execute Command uart5-analyzer TimestampFormat Virtual
+ Execute Command showAnalyzer "smc-uart-analyzer" ${SMC_UART} Antmicro.Renode.Analyzers.LoggingUartAnalyzer
+ # Add SMC_UART virtual time so we can check the machine execution time
+ Execute Command smc-uart-analyzer TimestampFormat Virtual
Write Line to Uart start mltest waitForEcho=${WAIT_ECHO}
Wait For Line On Uart sdk_model_oneshot(nonexistent) returned Err(SDKNoSuchModel) (as expected)
# start oneshot
- Wait For Line On Uart mobilenet_v1_emitc_static.model started
- Wait For LogEntry "main returned: ", 0
- Wait For Line On Uart mobilenet_v1_emitc_static.model completed
+ Wait For Line On Uart ${MODEL_FILENAME} started
+ Wait For Line On Uart ${MODEL_FILENAME} completed
# start periodic
- Wait For Line On Uart Model mobilenet_v1_emitc_static.model started
+ Wait For Line On Uart Model ${MODEL_FILENAME} started
# NB: 10 runs of the model
FOR ${i} IN RANGE 10
- Wait For LogEntry "main returned: ", 0
Wait For Line On Uart Model completed: mask 0b0001
END
Wait For Line On Uart DONE
diff --git a/shodan_stress.robot b/shodan_stress.robot
index 4a93aef..43cd7d7 100644
--- a/shodan_stress.robot
+++ b/shodan_stress.robot
@@ -13,63 +13,21 @@
# limitations under the License.
#
*** Comments ***
-Stress test for shodan system.
+Tests to stress out the Shodan system in 4MB of RAM using released binaries.
+
+*** Settings ***
+Resource resources/common.resource
+Variables variables/common.py
*** Variables ***
${MAX_ITER} 100
-
-${LOG_TIMEOUT} 2
-${FPGA_UART_TIMEOUT} 60
-${ROOTDIR} ${CURDIR}/../..
${SCRIPT} sim/config/shodan.resc
-${PROMPT} CANTRIP>
-${UART5} sysbus.uart5
-
-${MATCHA_BUNDLE_RELEASE} ${ROOTDIR}/out/matcha-bundle-release.elf
-${CANTRIP_KERNEL_RELEASE} ${ROOTDIR}/out/cantrip/shodan/release/kernel/kernel.elf
-${CANTRIP_ROOTSERVER_RELEASE} ${ROOTDIR}/out/cantrip/shodan/release/capdl-loader
-
-${OUT_TMP} ${ROOTDIR}/out/tmp
-
-${FLASH_RELEASE_TAR} out/cantrip/shodan/release/ext_flash.tar
-${CPIO_RELEASE} out/cantrip/shodan/release/ext_builtins.cpio
-
-*** Keywords ***
-Prepare Machine
- Execute Command path set @${ROOTDIR}
- Execute Command $tar=@${FLASH_RELEASE_TAR}
- Execute Command $cpio=@${CPIO_RELEASE}
- Execute Command $kernel=@${CANTRIP_KERNEL_RELEASE}
- Execute Command $sc_bin=@${OUT_TMP}/matcha-tock-bundle.bin
- Set Default Uart Timeout 10
- Create Log Tester ${LOG_TIMEOUT}
- Execute Script ${SCRIPT}
- # Add UART5 virtual time so we can check the machine execution time
- Execute Command uart5-analyzer TimestampFormat Virtual
- Execute Command cpu0 IsHalted false
-
-Stop App
- [Arguments] ${app}
- Write Line To Uart stop ${app}
- Wait For Line On Uart Bundle "${app}" stopped
*** Test Cases ***
- # NB: must have at least 2x spaces between Run Process arguments!
-Prepare Flash Tarball
- Run Process mkdir -p ${OUT_TMP}
- Run Process cp -f ${MATCHA_BUNDLE_RELEASE} ${OUT_TMP}/matcha-tock-bundle-release
- Run Process riscv32-unknown-elf-strip ${OUT_TMP}/matcha-tock-bundle-release
- Run Process riscv32-unknown-elf-objcopy -O binary -g ${OUT_TMP}/matcha-tock-bundle-release ${OUT_TMP}/matcha-tock-bundle.bin
- Run Process ln -sfr ${CANTRIP_KERNEL_RELEASE} ${OUT_TMP}/kernel
- Run Process ln -sfr ${CANTRIP_ROOTSERVER_RELEASE} ${OUT_TMP}/capdl-loader
- Run Process tar -C ${OUT_TMP} -cvhf ${ROOTDIR}/${FLASH_RELEASE_TAR} matcha-tock-bundle.bin kernel capdl-loader
- Provides flash-tarball
-
Test Shodan Boot
- Requires flash-tarball
Prepare Machine
Start Emulation
- Create Terminal Tester ${UART5}
+ Create Terminal Tester ${SMC_UART}
Wait For Prompt On Uart EOF
FOR ${iter} IN RANGE ${MAX_ITER}
diff --git a/test.sh b/test.sh
index 718f54a..5d777d5 100755
--- a/test.sh
+++ b/test.sh
@@ -28,16 +28,16 @@
STTY_CONFIG=$(stty -g 2>/dev/null)
+BUILD_TYPE=release
ARGS=(
-u "$(get_path "${RENODE_DIR}/tests/run_tests.py")"
+ --variable "PLATFORM:${PLATFORM}"
)
if [[ $1 == "--debug" ]]; then
echo "Running debug artifacts"
shift
- ARGS+=(
- --variable "RUN_DEBUG:1"
- )
+ BUILD_TYPE=debug
fi
if [[ $1 == "--wrapper" ]]; then
@@ -56,6 +56,13 @@
)
fi
+if [[ "${BUILD_TYPE}" == "debug" ]]; then
+ ARGS+=(
+ --variable "RUN_DEBUG:1"
+ --variable "BUILD_TYPE:debug"
+ )
+fi
+
ARGS+=(
--exclude "skip_${DETECTED_OS}"
-r "$(get_path "${TESTS_RESULTS}")"
diff --git a/variables/__init__.py b/variables/__init__.py
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/variables/__init__.py
diff --git a/variables/common.py b/variables/common.py
new file mode 100644
index 0000000..a9a1f72
--- /dev/null
+++ b/variables/common.py
@@ -0,0 +1,42 @@
+from os import environ
+from robot.libraries.BuiltIn import BuiltIn
+
+# This variable is set to be 0 by default, and should be overridden on
+# the CLI to test debug builds. Ie:
+# sim/tests/test.sh --debug sim/tests/shodan_boot.robot
+RUN_DEBUG = 0
+
+# This variable is set to be 'release' by default, and should be
+# overridden on the CLI to test debug builds. Ie:
+# sim/tests/test.sh --debug sim/tests/shodan_boot.robot
+# Because we use this variable later in this file we must check to see if
+# it was passed, else any changes are only local to this file
+_BUILD_TYPE = BuiltIn().get_variable_value("${BUILD_TYPE}")
+if _BUILD_TYPE:
+ BUILD_TYPE = _BUILD_TYPE
+else:
+ BUILD_TYPE = 'release'
+
+# Whether or not to wait for echoed back characters and validate those characters.
+WAIT_ECHO = True
+
+# How long to wait for a read to time out.
+LOG_TIMEOUT = 2
+
+# Default Cantrip prompt string.
+PROMPT = 'CANTRIP>'
+
+# The sysbus name for the UART connected to the SMC.
+SMC_UART = 'sysbus.uart5'
+
+ROOTDIR = environ['ROOTDIR']
+PLATFORM = environ['PLATFORM']
+
+CANTRIP_OUTDIR = f'{ROOTDIR}/out/cantrip/{PLATFORM}/{BUILD_TYPE}'
+
+SCRIPT = f'{ROOTDIR}/sim/config/{PLATFORM}.resc'
+MATCHA_BUNDLE_PATH = f'{ROOTDIR}/out/matcha-bundle-{BUILD_TYPE}.elf'
+CANTRIP_KERNEL = f'{CANTRIP_OUTDIR}/kernel/kernel.elf'
+CANTRIP_ROOTSERVER = f'{CANTRIP_OUTDIR}/capdl-loader'
+FLASH_TAR = f'{CANTRIP_OUTDIR}/ext_flash.tar'
+CPIO = f'{CANTRIP_OUTDIR}/ext_builtins.cpio'
diff --git a/variables/common_fpga.py b/variables/common_fpga.py
new file mode 100644
index 0000000..aae3173
--- /dev/null
+++ b/variables/common_fpga.py
@@ -0,0 +1,16 @@
+from common import *
+
+# Override the common LOG_TIMEOUT, since the FPGA is slower.
+LOG_TIMEOUT = 60
+
+# This variable is set to be 0 for renode tests, and should be
+# overridden on CLI to test on the FPGA. Ie:
+# sim/tests/fpga_test.sh 02 sim/tests/shodan_boot.robot
+FPGA_BOARD_ID = 0
+
+# Tunable. Can be overridden, but this is the default number of seconds
+# to wait between quiesce reads. Essentially, if we don't have any data
+# on the UART within this time, we consider the UART to be "quiesced"
+# and can then proceed with doing writes and readbacks.
+FPGA_QUIESCE_DELAY_SECONDS = 1
+
diff --git a/variables/nexus_debug.py b/variables/nexus_debug.py
new file mode 100644
index 0000000..f80a8ff
--- /dev/null
+++ b/variables/nexus_debug.py
@@ -0,0 +1,16 @@
+from common_fpga import *
+
+LOG_TIMEOUT = 60
+
+# This variable is set to be 0 for renode tests, and should be
+# overridden on CLI to test on the FPGA. Ie:
+# sim/tests/fpga_test.sh 02 sim/tests/shodan_boot.robot
+FPGA_BOARD_ID = 0
+
+# Tunable. Can be overridden, but this is the default number of seconds
+# to wait between quiesce reads. Essentially, if we don't have any data
+# on the UART within this time, we consider the UART to be "quiesced"
+# and can then proceed with doing writes and readbacks.
+FPGA_QUIESCE_DELAY_SECONDS = 5
+
+MODEL_FILENAME = 'conv1x1_test_emitc_static.kelvin'
diff --git a/variables/nexus_release.py b/variables/nexus_release.py
new file mode 100644
index 0000000..4a62d17
--- /dev/null
+++ b/variables/nexus_release.py
@@ -0,0 +1,3 @@
+from common_fpga import *
+
+MODEL_FILENAME = 'hello_world.kelvin'
diff --git a/variables/shodan_debug.py b/variables/shodan_debug.py
new file mode 100644
index 0000000..e79aff3
--- /dev/null
+++ b/variables/shodan_debug.py
@@ -0,0 +1,7 @@
+from common import *
+
+LOG_TIMEOUT = 60
+
+# The ML model filename to check for in ML tests.
+MODEL_FILENAME = 'mobilenet_v1_emitc_static.model'
+
diff --git a/variables/shodan_release.py b/variables/shodan_release.py
new file mode 100644
index 0000000..cf1b487
--- /dev/null
+++ b/variables/shodan_release.py
@@ -0,0 +1,7 @@
+from common import *
+
+LOG_TIMEOUT = 20
+
+# The ML model filename to check for in ML tests.
+MODEL_FILENAME = 'mobilenet_v1_emitc_static.model'
+
