| commit | b00792767f2c7c1615076b89151a8c8eb0f75124 | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Mon Jan 22 10:31:50 2024 -0800 |
| committer | Alex Van Damme <atv@google.com> | Mon Jan 22 13:56:27 2024 -0800 |
| tree | ddddc4e5d9109eb0fe9391f226f1fe37fc3e8744 | |
| parent | b361cf7e29cde0ea7cdec10141e0398c4f8594ec [diff] |
Add minstret / minstreth to Kelvin sim PiperOrigin-RevId: 600500043
This project contains the instruction simulator of Kelvin ML core based on MPACT-Sim and MPACT-RiscV. The simulator supports RISC-V 32im configuration + Kelvin-specific SIMD instructions. Please review ISA Spec for more detail
sim Simulator implementations | ˪ proto Trace dump protobuf definition. | ˪ renode Renode(https://github.com/renode/renode) integration interface | ˪ test Simulated instruction / Framework function unit tests
To build all targets, run
bazel build //...
Specifically, the simulator standalone binary can be built with
bazel build //sim:kelvin_sim