Import of kelvin-sim using copybara.
Included changes:
- 738578412 Enable all of ZBB in Kelvin, extend test by atv <atv@google.com>
- 720423411 Used header <tuple> is not included directly by Shodan Team <no-reply@google.com>
- 706362345 LSC: Replace loads for cc_proto_library by Shodan Team <no-reply@google.com>
- 691434161 LSC: Add load statements for Proto rules by Shodan Team <no-reply@google.com>
- 689681067 Fix 4 DeadCode findings: by Shodan Team <no-reply@google.com>
PiperOrigin-RevId: 738578412
Change-Id: I02f5c9cd8a78b0cb6da1335bfe0f2cca32b3b948
diff --git a/sim/kelvin.bin_fmt b/sim/kelvin.bin_fmt
index e8f0cce..3114ab8 100644
--- a/sim/kelvin.bin_fmt
+++ b/sim/kelvin.bin_fmt
@@ -13,6 +13,7 @@
KelvinVectorShiftInst;
RiscVZbbInst32;
RiscVZbbInst32Only;
+ RiscVZbbImmInst32;
};
#include "sim/kelvin_format.bin_fmt"
diff --git a/sim/kelvin.isa b/sim/kelvin.isa
index 0467dda..c8b7cb5 100644
--- a/sim/kelvin.isa
+++ b/sim/kelvin.isa
@@ -21,18 +21,11 @@
// Combining all kelvin instruction sets.
slot kelvin : riscv32i, riscv32m, zicsr, zfencei, privileged, kelvin_arith,
kelvin_conv, kelvin_log, kelvin_memory, kelvin_mul, kelvin_shift,
- kelvin_vector_memory, riscv32_zbb {
+ kelvin_vector_memory, riscv32_zbb, riscv32_zbb_imm {
includes {
#include "sim/kelvin_instructions.h"
}
default opcode =
disasm: "Illegal instruction at 0x%(@:08x)",
semfunc: "&KelvinIllegalInstruction";
-
- opcodes {
- ror = delete;
- rol = delete;
- orcb = delete;
- rev8 = delete;
- }
}
diff --git a/sim/kelvin_encoding.cc b/sim/kelvin_encoding.cc
index 1fd63ea..b5026c3 100644
--- a/sim/kelvin_encoding.cc
+++ b/sim/kelvin_encoding.cc
@@ -163,6 +163,11 @@
encoding::inst32_format::ExtractRUimm5(inst_word_));
}));
source_op_getters_.insert(
+ std::make_pair(static_cast<int>(SourceOpEnum::kRUimm5), [this]() {
+ return new mpact::sim::generic::ImmediateOperand<uint32_t>(
+ encoding::inst32_format::ExtractRUimm5(inst_word_));
+ }));
+ source_op_getters_.insert(
std::make_pair(static_cast<int>(SourceOpEnum::kJImm12), [this]() {
return new mpact::sim::generic::ImmediateOperand<int32_t>(
encoding::inst32_format::ExtractImm12(inst_word_));
@@ -360,6 +365,7 @@
decode_functions.push_back(encoding::DecodeKelvinVectorShiftInst);
decode_functions.push_back(encoding::DecodeRiscVZbbInst32);
decode_functions.push_back(encoding::DecodeRiscVZbbInst32Only);
+ decode_functions.push_back(encoding::DecodeRiscVZbbImmInst32);
for (auto &function : decode_functions) {
opcode_ = function(inst_word_);
if (opcode_ != OpcodeEnum::kNone) break;
diff --git a/sim/proto/BUILD b/sim/proto/BUILD
index 88b934d..690d9c1 100644
--- a/sim/proto/BUILD
+++ b/sim/proto/BUILD
@@ -16,6 +16,7 @@
+
package(default_visibility = ["//visibility:public"])
proto_library(
diff --git a/sim/test/kelvin_encoding_test.cc b/sim/test/kelvin_encoding_test.cc
index 5d1a38f..8200b90 100644
--- a/sim/test/kelvin_encoding_test.cc
+++ b/sim/test/kelvin_encoding_test.cc
@@ -103,6 +103,25 @@
constexpr uint32_t kDivu = 0b0000001'00000'00000'101'00000'0110011;
constexpr uint32_t kRem = 0b0000001'00000'00000'110'00000'0110011;
constexpr uint32_t kRemu = 0b0000001'00000'00000'111'00000'0110011;
+// ZBB
+constexpr uint32_t kAndn = 0b0100000'00000'00000'111'00000'0110011;
+constexpr uint32_t kOrn = 0b0100000'00000'00000'110'00000'0110011;
+constexpr uint32_t kXnor = 0b0100000'00000'00000'100'00000'0110011;
+constexpr uint32_t kClz = 0b0110000'00000'00000'001'00000'0010011;
+constexpr uint32_t kCtz = 0b0110000'00001'00000'001'00000'0010011;
+constexpr uint32_t kCpop = 0b0110000'00010'00000'001'00000'0010011;
+constexpr uint32_t kMax = 0b0000101'00000'00000'110'00000'0110011;
+constexpr uint32_t kMaxu = 0b0000101'00000'00000'111'00000'0110011;
+constexpr uint32_t kMin = 0b0000101'00000'00000'100'00000'0110011;
+constexpr uint32_t kMinu = 0b0000101'00000'00000'101'00000'0110011;
+constexpr uint32_t kSextB = 0b0110000'00100'00000'001'00000'0010011;
+constexpr uint32_t kSextH = 0b0110000'00101'00000'001'00000'0010011;
+constexpr uint32_t kRol = 0b0110000'00000'00000'001'00000'0110011;
+constexpr uint32_t kRor = 0b0110000'00000'00000'101'00000'0110011;
+constexpr uint32_t kOrcb = 0b0010100'00111'00000'101'00000'0010011;
+constexpr uint32_t kRev8 = 0b0110100'11000'00000'101'00000'0010011;
+constexpr uint32_t kZextH = 0b0000100'00000'00000'100'00000'0110011;
+constexpr uint32_t kRori = 0b0110000'00000'00000'101'00000'0010011;
// Kelvin System Op
constexpr uint32_t kGetMaxVl = 0b0001'0'00'00000'00000'000'00000'111'0111;
@@ -182,6 +201,45 @@
return (iword | ((sz & 0x3) << 12));
}
+TEST_F(KelvinEncodingTest, RV32ZBBOpcodes) {
+ enc_->ParseInstruction(kAndn);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kAndn);
+ enc_->ParseInstruction(kOrn);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kOrn);
+ enc_->ParseInstruction(kXnor);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kXnor);
+ enc_->ParseInstruction(kClz);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kClz);
+ enc_->ParseInstruction(kCtz);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kCtz);
+ enc_->ParseInstruction(kCpop);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kCpop);
+ enc_->ParseInstruction(kMax);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kMax);
+ enc_->ParseInstruction(kMaxu);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kMaxu);
+ enc_->ParseInstruction(kMin);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kMin);
+ enc_->ParseInstruction(kMinu);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kMinu);
+ enc_->ParseInstruction(kSextB);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kSextB);
+ enc_->ParseInstruction(kSextH);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kSextH);
+ enc_->ParseInstruction(kRol);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kRol);
+ enc_->ParseInstruction(kRor);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kRor);
+ enc_->ParseInstruction(kOrcb);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kOrcb);
+ enc_->ParseInstruction(kRev8);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kRev8);
+ enc_->ParseInstruction(kZextH);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kZextH);
+ enc_->ParseInstruction(kRori);
+ EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kRori);
+}
+
TEST_F(KelvinEncodingTest, RV32IOpcodes) {
enc_->ParseInstruction(SetRd(kLui, kRdValue));
EXPECT_EQ(enc_->GetOpcode(SlotEnum::kKelvin, 0), OpcodeEnum::kLui);
@@ -389,7 +447,7 @@
// Test vld.b.x (x = x0)
auto *src = EncodeOpHelper<RV32SourceOperand>(kVld, OpcodeEnum::kVldBX,
SourceOpEnum::kVs1);
- EXPECT_EQ(src->AsString(), "0");
+ EXPECT_EQ(src->AsString(), "zero");
delete src;
// Test vld.w.l.xx
@@ -641,7 +699,7 @@
auto *src = EncodeOpHelper<RV32SourceOperand>(
kVAddBase | 0b10, OpcodeEnum::kVaddBVx, SourceOpEnum::kVs2);
- EXPECT_EQ(src->AsString(), "0");
+ EXPECT_EQ(src->AsString(), "zero");
delete src;
}
diff --git a/sim/test/kelvin_vector_instructions_test.cc b/sim/test/kelvin_vector_instructions_test.cc
index 55c58a3..652181a 100644
--- a/sim/test/kelvin_vector_instructions_test.cc
+++ b/sim/test/kelvin_vector_instructions_test.cc
@@ -177,31 +177,6 @@
KelvinHalftypeVectorBinaryOpHelper<F, TNext1, TNext...>(name);
}
- template <template <typename, typename, typename> class F, typename TD,
- typename TS1, typename TS2>
- void KelvinVectorVXBinaryOpHelper(absl::string_view name) {
- const auto name_with_type = absl::StrCat(name, KelvinTestTypeSuffix<TD>());
-
- // Vector OP vector-scalar.
- BinaryOpTestHelper<TD, TS1, TS2>(
- absl::bind_front(F<TD, TS1, TS2>::KelvinOp, kNonStripmine),
- absl::StrCat(name_with_type, "VX"), kIsScalar, kNonStripmine,
- F<TD, TS1, TS2>::Op);
-
- // Vector OP vector-scalar stripmined.
- BinaryOpTestHelper<TD, TS1, TS2>(
- absl::bind_front(F<TD, TS1, TS2>::KelvinOp, kIsStripmine),
- absl::StrCat(name_with_type, "VXM"), kIsScalar, kIsStripmine,
- F<TD, TS1, TS2>::Op);
- }
-
- template <template <typename, typename, typename> class F, typename TD,
- typename TS1, typename TS2, typename TNext1, typename... TNext>
- void KelvinVectorVXBinaryOpHelper(absl::string_view name) {
- KelvinVectorVXBinaryOpHelper<F, TD, TS1, TS2>(name);
- KelvinVectorVXBinaryOpHelper<F, TNext1, TNext...>(name);
- }
-
template <template <typename, typename, typename> class F, typename T>
void KelvinVectorShiftBinaryOpHelper(absl::string_view name) {
const auto name_with_type = absl::StrCat(name, KelvinTestTypeSuffix<T>());
@@ -673,7 +648,6 @@
static void KelvinOp(bool strip_mine, Instruction *inst) {
KelvinVPadd<Vd, Vs2>(strip_mine, inst);
}
- static constexpr auto kArgsGetter = PairwiseOpArgsGetter<Vs1>;
};
TEST_F(KelvinVectorInstructionsTest, VPadd) {
diff --git a/sim/test/kelvin_vector_instructions_test_base.h b/sim/test/kelvin_vector_instructions_test_base.h
index ceb9c3f..8141ef7 100644
--- a/sim/test/kelvin_vector_instructions_test_base.h
+++ b/sim/test/kelvin_vector_instructions_test_base.h
@@ -61,7 +61,6 @@
constexpr uint32_t kNumVectorRegister = 64;
constexpr char kRs1Name[] = "x1";
constexpr char kRs2Name[] = "x2";
-constexpr int kRs1 = 1;
constexpr int kVd = 32;
constexpr int kVs1 = 8;
constexpr int kVs2 = 24;
diff --git a/sim/test/kelvin_vector_memory_instructions_test.cc b/sim/test/kelvin_vector_memory_instructions_test.cc
index d236426..9ad8bc6 100644
--- a/sim/test/kelvin_vector_memory_instructions_test.cc
+++ b/sim/test/kelvin_vector_memory_instructions_test.cc
@@ -19,6 +19,7 @@
#include <algorithm>
#include <cstdint>
#include <limits>
+#include <tuple>
#include <utility>
#include <vector>
