tree 82245864fa7996a4023067d0fa951a683e39ed4f
parent a07bb70c6a9b975bd61188688316a4ea2d0e41de
author Jon Tate <jonathantate@google.com> 1688082326 +0000
committer Jon Tate <jonathantate@google.com> 1688089099 +0000

Add Kelvin core definition

This new core supports Kelvin's MPAUSE instruction, but is otherwise
a standard RV32IM core. In particular, Kelvin's SIMD extension is NOT
supported.

The top-level control register for reset, halt and initial PC should
function as expected. The interrupt management control registers are
also implemented. All of the other control registers are placeholders.

Change-Id: I537873eb3f2d01fb37d38c96f9016b65617677ce