Track mpact changes Change-Id: If4599e8c67a86e289c4c7d7608de7665ee9967c9
diff --git a/shodan_infrastructure/MpactCPU.cs b/shodan_infrastructure/MpactCPU.cs index 981cbe3..ebc82e1 100644 --- a/shodan_infrastructure/MpactCPU.cs +++ b/shodan_infrastructure/MpactCPU.cs
@@ -81,6 +81,7 @@ string cpuType, IMachine machine, Endianess endianness, CpuBitness bitness = CpuBitness.Bits32) : base(id, cpuType, machine, endianness, bitness) { + this.cpu_type = cpuType; this.memoryBase = memoryBase; this.memorySize = memorySize; // Allocate space for marshaling data to/from simulator. @@ -203,7 +204,7 @@ new FuncInt32UInt64IntPtrInt32(ReadSysMemory); write_sysmem_delegate = new FuncInt32UInt64IntPtrInt32(WriteSysMemory); - mpact_id = construct_with_sysbus(maxStringLen, + mpact_id = construct_with_sysbus(cpu_type, maxStringLen, read_sysmem_delegate, write_sysmem_delegate); if (mpact_id < 0) { @@ -256,7 +257,7 @@ if (registerMap.Count == 0) { GetMpactRegisters(); } - return GetRegisterUnsafe(PC_ID); + return GetRegister(PC_ID); } set { @@ -319,7 +320,7 @@ } // ICPUWithRegisters methods implementations. - public void SetRegisterUnsafe(int register, RegisterValue value) { + public void SetRegister(int register, RegisterValue value) { var status = write_register((Int32)mpact_id, (Int32)register, (UInt64)value); if (status < 0) { @@ -327,7 +328,11 @@ } } - public RegisterValue GetRegisterUnsafe(int register) { + public void SetRegisterUnsafe(int register, RegisterValue value) { + SetRegister(register, value); + } + + public RegisterValue GetRegister(int register) { var status = read_register(mpact_id, register, value_ptr); if (status < 0) { LogAndThrowRE("Failed to read register " + register); @@ -352,6 +357,10 @@ return (ulong)0; } + public RegisterValue GetRegisterUnsafe(int register) { + return GetRegister(register); + } + protected void GetMpactRegisters() { if (registerMap.Count != 0) return; Int32 num_regs = get_reg_info_size(mpact_id); @@ -592,14 +601,14 @@ // Declare some additional function signatures. [UnmanagedFunctionPointer(CallingConvention.Cdecl)] - public delegate Int32 ConnectWithSysbus(Int32 param0, Int32 param1, - FuncInt32UInt64IntPtrInt32 param2, - FuncInt32UInt64IntPtrInt32 param3); + public delegate Int32 ConnectWithSysbus(string param0, Int32 param1, Int32 param2, + FuncInt32UInt64IntPtrInt32 param3, + FuncInt32UInt64IntPtrInt32 param4); [UnmanagedFunctionPointer(CallingConvention.Cdecl)] - public delegate Int32 ConstructWithSysbus(Int32 param0, - FuncInt32UInt64IntPtrInt32 param1, - FuncInt32UInt64IntPtrInt32 param2); + public delegate Int32 ConstructWithSysbus(string param0, Int32 param1, + FuncInt32UInt64IntPtrInt32 param2, + FuncInt32UInt64IntPtrInt32 param3); [UnmanagedFunctionPointer(CallingConvention.Cdecl)] public delegate Int32 SetConfig(Int32 param0, string[] param1, @@ -620,13 +629,13 @@ // Functions that are imported from the mpact sim library. #pragma warning disable 649 [Import(UseExceptionWrapper = false)] - // Int32 construct_with_sysbus(Int32 id, + // Int32 construct_with_sysbus(string cpu_type, Int32 id, // Int32 read_callback(UInt64, IntPtr, Int32), // Int32 write_callback(UInt64, IntPtr, Int32)); private ConstructWithSysbus construct_with_sysbus; [Import(UseExceptionWrapper = false)] - // Int32 connect_with_sybsus(Int32 id, + // Int32 connect_with_sybsus(string cpu_type, Int32 id, // Int32 read_callback(UInt64, IntPtr, Int32), // Int32 write_callback(UInt64, IntPtr, Int32)); private ConnectWithSysbus connect_with_sysbus; @@ -687,6 +696,7 @@ #pragma warning restore 649 private Int32 mpact_id = -1; + private string cpu_type; private ulong instructionsExecutedThisRound {get; set;} private ulong totalExecutedInstructions {get; set;} private const int PC_ID = 0x07b1;
diff --git a/shodan_infrastructure/MpactCheriotCPU.cs b/shodan_infrastructure/MpactCheriotCPU.cs index c75db30..8abf5cc 100644 --- a/shodan_infrastructure/MpactCheriotCPU.cs +++ b/shodan_infrastructure/MpactCheriotCPU.cs
@@ -42,6 +42,12 @@ namespace Antmicro.Renode.Peripherals.MpactCPU { +public enum CheriotCpu { + Base = 0, + Rvv = 1, + RvvFp = 2, +} + // The MpactCheriotCPU class. This class derives from BaseCPU, which implements // a CPU in ReNode. It is the interface between ReNode and the mpact_cheriot // simulator library.