//
// Copyright (c) 2024 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

// XXX this can go away after nexus-release.repl is refactored

using "sim/config/platforms/sencha_smc.repl"
using "sim/config/platforms/secure.repl"
using "sim/config/platforms/kelvin.repl"

// To model the TLUL mailbox spec, we need a Renode peripheral that listens
// to address ranges for both endpoints of the mailbox. This is the current
// best way to do that, per Renode dev's recommendations.

mailbox : Mailbox @ {
        sysbus new Bus.BusMultiRegistration {
            address: 0x40800000;  // TOP_MATCHA_MAILBOX_SEC_BASE_ADDR
            size: 0x28;
            region: "endpoint_a"
        };
        sysbus new Bus.BusMultiRegistration {
            address: 0x540F1000;  // TOP_MATCHA_MAILBOX_SMC_BASE_ADDR
            size: 0x28;
            region: "endpoint_b"
        }
    }
    endpoint_a_name: "SEC"
    endpoint_b_name: "SMC"
    wtirq_A -> plic@187    // kTopMatchaPlicIrqIdMailboxSecWtirq
    rtirq_A -> plic@188    // kTopMatchaPlicIrqIdMailboxSecRtirq
    eirq_A  -> plic@189    // kTopMatchaPlicIrqIdMailboxSecEirq
    wtirq_B -> smc_plic@30 // kTopMatchaPlicIrqIdMailboxSmcWtirq
    rtirq_B -> smc_plic@31 // kTopMatchaPlicIrqIdMailboxSmcRtirq
    eirq_B  -> smc_plic@32 // kTopMatchaPlicIrqIdMailboxSmcEirq

// ISP               [‘h4200_0000 - ‘h4200_FFFF)  64KB ISP registers
// DMA Ctrl          [‘h4201_0000 - ‘h4201_FFFF)  64KB DMA control interface
// DSP Ctrl          [‘h4202_0000 - ‘h4202_FFFF)  64KB Audio DSP control interface

// TOP_MATCHA_I2S0_BASE_ADDR @ top_matcha.h
// I2S0              ['h5410_0000 - 'h5410_0040)  64B registers
i2s0 : Sound.MatchaI2S @ sysbus 0x54100000
    TxWatermarkIRQ -> smc_plic@39       // kTopMatchaPlicIrqIdI2s0TxWatermark @ top_matcha.h
    RxWatermarkIRQ -> smc_plic@40       // kTopMatchaPlicIrqIdI2s0RxWatermark @ top_matcha.h
    TxEmptyIRQ -> smc_plic@41           // kTopMatchaPlicIrqIdI2s0TxEmpty @ top_matcha.h
    RxOverflowIRQ -> smc_plic@42        // kTopMatchaPlicIrqIdI2s0RxOverflow @ top_matcha.h

ml_top_controlblock :
    HostReqIRQ -> smc_plic@33
    FinishIRQ -> smc_plic@34
    InstructionFaultIRQ -> smc_plic@35

// Flash/MRAM        [‘h4400_0000 - ‘h47FF_FFFF)  64MB External Non-Volatile Memory
extflash_mem:
    size: 0x04000000