sencha/bancha: sync with upstream for ICache/DCache support

Bypass-Presubmit-Reason:tested as part of chain

Change-Id: I60f0a75c380316a7506614cfc8cfce9ef9f29dde

shodan_infrastructure/MpactCheriotCPU.cs

diff --git a/shodan_infrastructure/MpactCheriotCPU.cs b/shodan_infrastructure/MpactCheriotCPU.cs
index fd4f858..211b05e 100644
--- a/shodan_infrastructure/MpactCheriotCPU.cs
+++ b/shodan_infrastructure/MpactCheriotCPU.cs
@@ -89,6 +89,14 @@
             config_names.Add("clintPeriod");
             config_values.Add(clint_period.ToString("X"));
         }
+        if (icache_config != "") {
+            config_names.Add("iCache");
+            config_values.Add(icache_config);
+        }
+        if (dcache_config != "") {
+            config_names.Add("dCache");
+            config_values.Add(dcache_config);
+        }
     }
 
     public bool InstProfile {
@@ -111,6 +119,16 @@
         set => clint_period = value;
     }
 
+    public string ICache {
+        get => icache_config;
+        set => icache_config = value;
+    }
+
+    public string DCache {
+        get => dcache_config;
+        set => dcache_config = value;
+    }
+
     // ICPUWithHooks methods.
 
     public void AddHookAtInterruptBegin(Action<ulong> hook) {
@@ -138,6 +156,7 @@
     // ICluster methods.
     public new IEnumerable<ICluster<MpactCheriotCPU>> Clusters {get; } = new List<ICluster<MpactCheriotCPU>>(0);
     public new IEnumerable<MpactCheriotCPU> Clustered {get; }
+
     // ICPUSupportingGdb methods.
 
     public void EnterSingleStepModeSafely(HaltArguments args) {
@@ -186,6 +205,8 @@
     private UInt64 revocationMemBase;
     private UInt64 clint_mmr_base = 0x0;
     private UInt64 clint_period = 0;
+    private string icache_config = "";
+    private string dcache_config = "";
     private List<GDBFeatureDescriptor>
                 gdbFeatures = new List<GDBFeatureDescriptor>();
 }  // class MpactCheriotCPU

shodan_infrastructure/MpactRiscVCPU.cs

diff --git a/shodan_infrastructure/MpactRiscVCPU.cs b/shodan_infrastructure/MpactRiscVCPU.cs
index ca93625..1d273f6 100644
--- a/shodan_infrastructure/MpactRiscVCPU.cs
+++ b/shodan_infrastructure/MpactRiscVCPU.cs
@@ -45,7 +45,8 @@
 // The MpactRiscvCPU class. This class derives from BaseCPU, which implements
 // a CPU in ReNode. It is the interface between ReNode and the mpact_riscv32/64
 // simulator libraries.
-public class MpactRiscVCPU : MpactBaseCPU, ICpuSupportingGdb {
+public class MpactRiscVCPU : MpactBaseCPU, ICluster<MpactRiscVCPU>,
+                             ICpuSupportingGdb {
 
     public MpactRiscVCPU(uint id, UInt64 memoryBase, UInt64 memorySize,
                          string cpuType, IMachine machine,
@@ -53,6 +54,7 @@
                          CpuBitness bitness = CpuBitness.Bits32)
         : base(id, memoryBase, memorySize, cpuType, machine, endianness,
                bitness) {
+        Clustered = new MpactRiscVCPU[] { this };
     }
 
     ~MpactRiscVCPU() {
@@ -81,6 +83,14 @@
             config_names.Add("stackEnd");
             config_values.Add(stack_end.ToString("X"));
         }
+        if (icache_config != "") {
+            config_names.Add("iCache");
+            config_values.Add(icache_config);
+        }
+        if (dcache_config != "") {
+            config_names.Add("dCache");
+            config_values.Add(dcache_config);
+        }
     }
 
     public bool InstProfile {
@@ -109,6 +119,16 @@
         }
     }
 
+    public string ICache {
+        get => icache_config;
+        set => icache_config = value;
+    }
+
+    public string DCache {
+        get => dcache_config;
+        set => dcache_config = value;
+    }
+
     // ICPUWithHooks methods.
 
     public void AddHookAtInterruptBegin(Action<ulong> hook) {
@@ -133,6 +153,10 @@
     public void RemoveHooksAt(ulong addr) { /* empty */ }
     public void RemoveAllHooks() { /* empty */ }
 
+    // ICluster methods.
+    public new IEnumerable<ICluster<MpactRiscVCPU>> Clusters {get; } = new List<ICluster<MpactRiscVCPU>>(0);
+    public new IEnumerable<MpactRiscVCPU> Clustered {get; }
+
     // ICPUSupportingGdb methods.
 
     public void EnterSingleStepModeSafely(HaltArguments args) {
@@ -182,6 +206,8 @@
     private bool stack_size_set = false;
     private ulong stack_end;
     private bool stack_end_set = false;
+    private string icache_config = "";
+    private string dcache_config = "";
     private List<GDBFeatureDescriptor>
                 gdbFeatures = new List<GDBFeatureDescriptor>();
 }  // class MpactRiscVCPU