commit cdaaf36a144c7ca14d42baa7c327ba73a18327e7
author Sam Leffler <sleffler@google.com> Fri Jun 21 11:24:46 2024 -0700
committer Sam Leffler <sleffler@google.com> Fri Jun 21 11:30:04 2024 -0700
tree 001fc1e51667a71f20fc3fdafa4cdb4c9af622ae
parent c0a24f028dbda52fadaa63bfef8ae185fcce10c4

Springbok: track upstream change

Change-Id: I64737a5f61bfb569bb781a0fb312988cbad00689

shodan_infrastructure/SpringbokRiscV32.cs

diff --git a/shodan_infrastructure/SpringbokRiscV32.cs b/shodan_infrastructure/SpringbokRiscV32.cs
index 060cc49..bef2b2f 100644
--- a/shodan_infrastructure/SpringbokRiscV32.cs
+++ b/shodan_infrastructure/SpringbokRiscV32.cs
@@ -34,10 +34,10 @@
     {
         public SpringbokRiscV32(Core.Machine machine,
                                 uint hartId = 0,
-                                PrivilegeArchitecture privilegeArchitecture = PrivilegeArchitecture.Priv1_11,
+                                PrivilegedArchitecture privilegedArchitecture = PrivilegedArchitecture.Priv1_11,
                                 Endianess endianness = Endianess.LittleEndian,
                                 string cpuType = "rv32imfv_zicsr")
-            : base(machine, cpuType, null, hartId, privilegeArchitecture, endianness)
+            : base(machine, cpuType, null, hartId, privilegedArchitecture, endianness)
         {
             RegisterCustomCSRs();