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opensecura / sim / config / 3f4bad76a7d5319510dc9dde106ac8b408c22bd2
commit3f4bad76a7d5319510dc9dde106ac8b408c22bd2[log] [tgz]
authorSam Leffler <sleffler@google.com>Thu Apr 25 11:01:37 2024 -0700
committerSam Leffler <sleffler@google.com>Fri Apr 26 16:38:34 2024 -0700
tree1587d7578c5f6d24a35e2c1fd51f1813bed849c8
parented3415c7234409abeaab6a287e7719cdc2db9e6f [diff]
i2s: fix interrupt state register handling

The INTR_STATE register uses W1C (Write-once Clear) semantics.

Change-Id: If6ac172fffa34ef7233f7917c222b4f49ab613bb
1 file changed
tree: 1587d7578c5f6d24a35e2c1fd51f1813bed849c8
  1. platforms/
  2. shodan_infrastructure/
  3. nexus.resc ⇨ shodan.resc
  4. CONTRIBUTING.md
  5. gdbinit
  6. kelvin.resc
  7. LICENSE
  8. README.md
  9. sencha.resc
  10. shodan.resc
  11. springbok.resc
README.md

Simulation Configuration

This project hosts the Renode simulation description, platform definition, and simulation models for customized components.

Project structure

  • platforms: renode platform definitions
  • shodan_infrastructure: customized component model used in Renode's runtime compilation