)]}'
{
  "commit": "3f4bad76a7d5319510dc9dde106ac8b408c22bd2",
  "tree": "1587d7578c5f6d24a35e2c1fd51f1813bed849c8",
  "parents": [
    "ed3415c7234409abeaab6a287e7719cdc2db9e6f"
  ],
  "author": {
    "name": "Sam Leffler",
    "email": "sleffler@google.com",
    "time": "Thu Apr 25 11:01:37 2024 -0700"
  },
  "committer": {
    "name": "Sam Leffler",
    "email": "sleffler@google.com",
    "time": "Fri Apr 26 16:38:34 2024 -0700"
  },
  "message": "i2s: fix interrupt state register handling\n\nThe INTR_STATE register uses W1C (Write-once Clear) semantics.\n\nChange-Id: If6ac172fffa34ef7233f7917c222b4f49ab613bb\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "3031755636041cb361ed579db94c373609dec9a8",
      "old_mode": 33188,
      "old_path": "shodan_infrastructure/MatchaI2S.cs",
      "new_id": "5845f703e2e3a2bfec168720786ce7632931619d",
      "new_mode": 33188,
      "new_path": "shodan_infrastructure/MatchaI2S.cs"
    }
  ]
}