diff --git a/cheriot.resc b/cheriot.resc
index 91e2d4e..bc9633d 100644
--- a/cheriot.resc
+++ b/cheriot.resc
@@ -19,26 +19,33 @@
 include @sim/config/shodan_infrastructure/MpactCheriotCPU.cs
 EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.MpactCPU.MpactCheriotCPU"
 EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.MpactCPU.MpactCheriotPeripheral"
-include @sim/config/shodan_infrastructure/SmcCheriotCPU.cs
 
-$platformfile?=@sim/config/platforms/sencha_smc.repl
+$platformfile?=@sim/config/platforms/cheriot.repl
 
 machine LoadPlatformDescription $platformfile
 
+$term_port?=3456
+emulation CreateServerSocketTerminal $term_port "term" false
+connector Connect sysbus.uart5 term
+
+showAnalyzer "uart5-analyzer" sysbus.uart5 Antmicro.Renode.Analyzers.LoggingUartAnalyzer
+uart5-analyzer TimestampFormat None
+
 $cheriotLibrary ?= @out/cheriot/sim/librenode_mpact_cheriot.so
 sysbus.cpu1 IsHalted true
 sysbus.cpu1 CpuLibraryPath $cheriotLibrary
 
 # Override cli_port to enable the command line interface on the specified port.
-$cli_port?= -1
+$cli_port ?= 0
+$wait_for_cli ?= false
 sysbus.cpu1 CLIPort $cli_port
-sysbus.cpu1 WaitForCLI false
+sysbus.cpu1 WaitForCLI $wait_for_cli
 
 logLevel 0 sysbus.cpu1
 
-#$bin?=@out/matcha/hw/boot_rom.elf
 $bin?=@out/cheriot/sencha/release/cheriot/cheriot/release/soundstream-firmware
 #$bin?=@sw/cheriot-rtos/examples/01.hello_world/build/cheriot/cheriot/release/hello_world
+
 # Load the ELF file (useVirtualAddress = false, allowLoadsOnlyToMemory = false)
 sysbus LoadELF $bin false false
 
diff --git a/platforms/cheriot.repl b/platforms/cheriot.repl
new file mode 100644
index 0000000..3e10869
--- /dev/null
+++ b/platforms/cheriot.repl
@@ -0,0 +1,40 @@
+//
+// Copyright (c) 2024 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     https://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+cpu1: MpactCPU.MpactCheriotCPU @ sysbus
+    id: 1
+    cpuType: "Mpact.Cheriot"
+    endianness: Endianess.LittleEndian
+    memoryBase: 0x80000000
+    memorySize: 0x10000000
+    revocationMemoryBase: 0x83000000
+
+ram_smc : MpactCPU.MpactCheriotPeripheral @ sysbus 0x80000000
+    size: 0x10000000
+    baseAddress: 0x80000000
+    mpactCpu: cpu1
+
+uart5: Antmicro.Renode.Peripherals.UART.TrivialUart @ sysbus 0x54000000
+
+smc_plic: IRQControllers.PlatformLevelInterruptController @sysbus 0x60000000
+    0 -> cpu1@11
+    numberOfSources: 42
+    numberOfContexts: 1
+    prioritiesEnabled: false
+
+smc_clint: IRQControllers.CoreLevelInterruptor @ sysbus 0x02000000
+    frequency: 66000000
+    [0, 1] ->cpu1@[3, 7]
+
diff --git a/platforms/sencha_smc.repl b/platforms/sencha_smc.repl
index 94937c5..702642a 100644
--- a/platforms/sencha_smc.repl
+++ b/platforms/sencha_smc.repl
@@ -17,38 +17,9 @@
 // Sencha SMC is a CHERIoT RISC-V CPU
 // ***************************************************
 
-// XXX set sysbus address elsewhere
-cpu1: MpactCPU.MpactCheriotCPU @ sysbus
-    id: 1
-    cpuType: "Mpact.Cheriot"
-    endianness: Endianess.LittleEndian
-    memoryBase: 0x80000000
-    memorySize: 0x04000000
-    revocationMemoryBase: 0x83000000 // Shadow bitmap
-
-ram_smc: MpactCPU.MpactCheriotPeripheral @ sysbus 0x80000000
-    size: 0x04000000
-    baseAddress: 0x80000000
-    mpactCpu: cpu1
-
+using "sim/config/platforms/cheriot.repl"
 // Control block for the SMC, lets us pause/restart the core at an arbitrary PC.
 smc_control: MpactCPU.SmcCheriot_ControlBlock @ sysbus 0x54020000
     cpu: cpu1
     pc: 0x80000000
 
-smc_clint: IRQControllers.CoreLevelInterruptor @ sysbus 0x02000000
-    frequency: 66000000
-    [0, 1] ->cpu1@[3, 7]
-
-smc_plic: IRQControllers.PlatformLevelInterruptController @ sysbus 0x60000000 // TOP_MATCHA_RV_PLIC_SMC_BASE_ADDR @ top_matcha.h
-    // Numbers on the left (0 ->) index PLIC GetGPIOs.
-    //
-    // Numbers on the right reference bits in the target MIP.
-    // Bit 11 corresponds MEIP and bit 9 to SEIP.
-    0 -> cpu1@11
-    numberOfSources: 42
-    numberOfContexts: 1  // MEIP only
-    prioritiesEnabled: false
-
-// XXX use TrivialUart until cheriot-rtos has an OpenTitan_UART driver
-uart5: Antmicro.Renode.Peripherals.UART.TrivialUart @ sysbus 0x54000000
diff --git a/sencha.resc b/sencha.resc
index c491fe0..2cf5e03 100644
--- a/sencha.resc
+++ b/sencha.resc
@@ -60,9 +60,10 @@
 sysbus.cpu1 CpuLibraryPath $cheriotLibrary
 
 # Override cli_port to enable the command line interface on the specified port.
-$cli_port?= -1
+$cli_port?= 0
+$wait_for_cli ?= false
 sysbus.cpu1 CLIPort $cli_port
-sysbus.cpu1 WaitForCLI true
+sysbus.cpu1 WaitForCLI $wait_for_cli
 
 $tar ?= @out/cantrip/shodan/release/ext_flash.tar
 $spi_flash_load_address ?= 0x44000000
diff --git a/shodan_infrastructure/MpactCheriotCPU.cs b/shodan_infrastructure/MpactCheriotCPU.cs
index 0f0fe46..ecb6a85 100644
--- a/shodan_infrastructure/MpactCheriotCPU.cs
+++ b/shodan_infrastructure/MpactCheriotCPU.cs
@@ -112,11 +112,11 @@
         config_values.Add("0x" + memoryBase.ToString("X"));
         config_values.Add("0x" + memorySize.ToString("X"));
         config_values.Add("0x" + revocationMemBase.ToString("X"));
-        if (cli_port > 0) {
-                            this.Log(LogLevel.Info, "Adding cli port");
+        if (cli_port != 0) {
+            this.Log(LogLevel.Info, "Adding cli port");
             config_names.Add("cliPort");
             config_values.Add("0x" + cli_port.ToString("X"));
-                config_names.Add("waitForCLI");
+            config_names.Add("waitForCLI");
             config_values.Add("0x" + (wait_for_cli ? 1 : 0).ToString("X"));
         }
         Int32 cfg_res = set_config(mpact_id, config_names.ToArray(),
@@ -209,7 +209,7 @@
         set => bin_file_info = value;
     }
 
-    public int CLIPort { get => cli_port; set => cli_port = value; }
+    public ushort CLIPort { get => cli_port; set => cli_port = value; }
 
     public bool WaitForCLI { get => wait_for_cli; set => wait_for_cli = value; }
 
@@ -590,7 +590,7 @@
 
     // End of IMpactPeripheral methods.
 
-    private int cli_port = -1;
+    private ushort cli_port = 0;
     private bool wait_for_cli = false;
     private UInt64 base_address = 0;
     private UInt64 size = 0;