commit | e8117868e2f83d2da52696b25e9ef6f9f7e5fc06 | [log] [tgz] |
---|---|---|
author | Kun Bian <kunb@google.com> | Tue Oct 17 22:56:14 2023 +0000 |
committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | Tue Oct 17 22:56:14 2023 +0000 |
tree | 9fb5d2767ec4a648e4583481b0b0c9fbab48dbf2 | |
parent | c6b65001c52271aa113f41c6a9670770edaf4493 [diff] | |
parent | d482b78e182885720b5db3fcea86135eabc076cd [diff] |
Merge "Add lc walkthrough tests to edacloud"
[Matcha] will be an open source SOC(system on chip) project.
This repository contains hardware, software and utilities written as part of the Matcha project. Plus it leverages the Opentitan Repository for its HW IPs, templates and utilities.
The project contains comprehensive documentation of all IPs and tools. You can access it.
Have a look at our GettingStarted Guide for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).
Development for matcha requires that the necessary tools and prerequisites be installed. See GettingStarted Guide
To setup the build system, run following steps at root of repo:
source build/setup.sh
Install the prerequisites:
m prereqs
Install the tools used for development:
m tools
<root_dir>/hw/matcha/ hw/top_matcha/ BUILD data/ dv/ formal/ ip/ ip_autogen/ ip_templates/ lint/ rtl/ sw/ syn/ util/ hw/ BUILD Makefile sw/ BUILD device/ hw_tests/ Maefile util/ BUILD topgen/ topgen_util topgen_matcha.py <root_dir>/hw/opentitan_upstream/ <root_dir>/build/ <root_dir>/Manifest/ <root_dir>/Makefile <root_dir>/GettingStarted.md <toot_dir>/...
For following steps, make sure the above “Prerequisites” steps have been run if the repo is been checked out at the first time.
Build RTL top Level and generate registers, interrupt and address map:
m matcha_hw_generate_all
Build verilator simulation target:
m matcha_hw_verilator_sim
Run matcha verilator test suite
m matcha_hw_verilator_tests
Run FPGA compilation flow for Nexus FPGA board:
m matcha_hw_fpga_nexus
Run matcha single test with messages to stdout
bazel test --test_output=streamed //sw/device/tests:verilator_mailbox_test
Run matcha test suites
bazel test --test_output=streamed //sw/device/tests:verilator_test_suite
Run FPGA compilation flow for Nexus FPGA board with debug commands:
bazel build -s //hw/bitstream/vivado:fpga_nexus
Enable tracing on a single test
bazel test --test_output=streamed --test_timeout=1000000 --test_arg=--trace //sw/device/tests:verilator_cam_ctrl_test
Note: --test_timeout=1000000
sets timeout in seconds. This helps prevent timeout issues then using trace.
Waveform dump and peripheral logs for a test located in:
<root_dir>/hw/matcha/bazel-testlogs/sw/device/tests/<test_name>/test.outputs/output.zip sim.fst (if tracing is enabled) uart0.log smc_uart.log spi0.log usb0.log
Note: The trace_core_#.log files available in output.zip is currently a TODO item.
<matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/impl_1/chip_matcha_nexus.bit <matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/impl_1/.rpt <matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/synth_1/.rpt