)]}'
{
  "commit": "d6818d592a2f0358ab5130f8cce4a0ec1625883c",
  "tree": "61c21c0ee03ca474347fa12c4d695ae55acd6d7a",
  "parents": [
    "102e8261ec5be95c4b07e38e413baa301eb23084"
  ],
  "author": {
    "name": "Bangfei",
    "email": "pbf@google.com",
    "time": "Mon Aug 14 18:13:07 2023 +0000"
  },
  "committer": {
    "name": "Yenkai Wang",
    "email": "ykwang@google.com",
    "time": "Thu Aug 17 15:50:07 2023 -0600"
  },
  "message": "[HW][Kelvin][Sram_1rwm_256x288.v]\"ifdef fpga\" move\n\n1. Move 2 registers defintion and assign statement inside \"ifdef FPGA\" branch.\n2. It will fix the both VCS and ASIC synthesis reported lint errors.\n\nChange-Id: Ia2e9cb040caa4bc79f6c96d1a27be1388ebed911\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "2327e3d80980529abc1d9eceaaffa1bd96ec1a6f",
      "old_mode": 33188,
      "old_path": "hw/top_matcha/ip/ml_top/rtl/Sram_1rwm_256x288.v",
      "new_id": "610fd94999318926b6ec0894e93b891590c75614",
      "new_mode": 33188,
      "new_path": "hw/top_matcha/ip/ml_top/rtl/Sram_1rwm_256x288.v"
    }
  ]
}