#include "hw/top_matcha/sw/autogen/top_matcha.h"
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/dif/dif_smc_ctrl.h"
#include "sw/device/lib/dif/dif_uart.h"
#include "sw/device/lib/runtime/print.h"
#include "sw/device/lib/testing/test_framework/check.h"
#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
#include "sw/device/lib/testing/test_framework/test_util.h"

#if defined(ISP_WRAPPER_IRQ)
#include "sw/device/tests/smc/smc_isp_wrapper_irq_test_fpga_nexus_bin_c.h"
#elif defined(ISP_WRAPPER_TPG_64_64)
#include "sw/device/tests/smc/smc_isp_wrapper_tpg_64_64_test_fpga_nexus_bin_c.h"
#elif defined(ISP_LIVE_CAM)
#include "sw/device/examples/demo_isp/isp_live_cam_test_smc_fpga_nexus_bin_c.h"
#endif

/*
 * Sample program to run some code on all cores in the system.
 * SC - Orchestrate the other cores, print status to UART.
 * SMC - Start ISP. Force 2 ISP interrupts.
 * ISP - Send 2 interrupts into SMC.
 */

OTTF_DEFINE_TEST_CONFIG();

static dif_smc_ctrl_t smc_ctrl;
static dif_uart_t uart;

void _ottf_main(void) {
  init_uart(TOP_MATCHA_UART0_BASE_ADDR, &uart);

  LOG_INFO("[SC] Demo app start from SC!");

  // Copy embedded binary to SMC RAM.
  memcpy((void *)TOP_MATCHA_RAM_SMC_BASE_ADDR, smc_bin, smc_bin_len);

  // Enable SMC.
  CHECK_DIF_OK(dif_smc_ctrl_init(
      mmio_region_from_addr(TOP_MATCHA_SMC_CTRL_BASE_ADDR), &smc_ctrl));
  CHECK_DIF_OK(dif_smc_ctrl_set_en(&smc_ctrl));

  LOG_INFO("[SC] Finished executing.");
  LOG_INFO("[SC] Check SMC messages!");
  asm volatile("wfi");
}