tree 0276e4fd33a8770dee5aa127bf3d15f7c54437c8
parent 3b33d44615b5721c20d17165295f25c33ad597f5
author Cindy Liu <hcindyl@google.com> 1699929386 -0800
committer Cindy Liu <hcindyl@google.com> 1700081083 -0800

Use kelvin.v built from hw/kelvin

* Add hw/kelvin into WORKSPACE
* Build kelvin.v and kelvin.core from @kelvin_hw in build time
* Retire the checked-in version of hw/ip/ml_top/rtl/*.v. They are
  fetched/built from hw/matcha
* Update ml_top.core to point to the kelvin verilog code via additional
  google:ip:kelvin core, defined in @kelvin_hw//hdl/chisel:kelvin.core
* Update DV fusesoc.json to align with verilator/FPGA cores dependency
* Update DV setup doc to reflect the changes.

Bug: 296625431

Change-Id: Ic461afa855ec5fd49402e6c2629d038ab4a72931