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opensecura/hw/matcha/a79b64d2c84b2efbf78ed6529c2f44f41e29b3df^1..a79b64d2c84b2efbf78ed6529c2f44f41e29b3df/.
commit
a79b64d2c84b2efbf78ed6529c2f44f41e29b3df
[log] [tgz]
author
Yenkai Wang <ykwang@google.com>
Thu Nov 16 21:20:21 2023 +0000
committer
Gerrit Code Review <noreply-gerritcodereview@google.com>
Thu Nov 16 21:20:21 2023 +0000
tree
bc1559ae9fb539b7b65f94f5ea7d449ef8d2f874
parent
023a64fbb114334d15174e00a84072166847105f [diff]
parent
0fda2a3354a927ae147c00123830ceaad8f55514 [diff]
Merge changes from topic "bring_up_hps_demo"

* changes:
  [sw][matcha] Update ISP registes setup for raw and bypass modes
  [sw][matcha] Update demo script for new server setup

diff --git a/sw/device/lib/dif/dif_isp_wrapper.c b/sw/device/lib/dif/dif_isp_wrapper.c
index e6f6ae2..3363d33 100644
--- a/sw/device/lib/dif/dif_isp_wrapper.c
+++ b/sw/device/lib/dif/dif_isp_wrapper.c

@@ -194,29 +194,11 @@
   return kDifOk;
 }
 
-// ISP configuration:
-// raw:320x240, byp:320x240
-dif_result_t dif_isp_wrapper_set_raw_320x240_byp_320x240_en(
-    const dif_isp_wrapper_t *isp_wrapper) {
-  return _dif_isp_wrapper_set_raw_320x240_byp_320x240_en(
-      isp_wrapper, 0x5a000000, 0x5a01a000, 0x5a01a000, 0x5a020000, 0x5a03a000,
-      0x5a03a000);
-}
-
-// ISP configuration:
-// raw:320x240, byp:320x240, hps image address: 0x00300000
-dif_result_t dif_isp_wrapper_set_ml_mem_byp_320x240_en(
-    const dif_isp_wrapper_t *isp_wrapper) {
-  return _dif_isp_wrapper_set_raw_320x240_byp_320x240_en(
-      isp_wrapper, 0x5a300000, 0x5a320000, 0x5a320000, 0x5a340000, 0x5a360000,
-      0x5a360000);
-}
-
-// TODO(ykwang): Remove the code duplication in this library. Use a config
-// variable to describe which field to set and implement an initialization
-// to setup ISP with the config. Unify all *_en functions in this library.
-dif_result_t _dif_isp_wrapper_set_raw_320x240_byp_320x240_en(
-    const dif_isp_wrapper_t *isp_wrapper,
+// ISP confituration: live, raw and bypass modes
+// Input arguments are frame weight, frame height and Y,Cb,Cr written addresses.
+dif_result_t _dif_isp_wrapper_set_raw_byp_en(
+    const dif_isp_wrapper_t *isp_wrapper, const uint32_t frame_width,
+    uint32_t frame_height,
     // TODO(ykwang): put these variables into a config variable.
     const uint32_t y_base_ad_init_addr, const uint32_t cb_base_ad_init_addr,
     const uint32_t cr_base_ad_init_addr, const uint32_t y_base_ad_init2_addr,
@@ -225,127 +207,113 @@
   if (isp_wrapper == NULL) {
     return kDifBadArg;
   }
-  mmio_region_write32(isp_wrapper->base_addr, VI_CCL, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, VI_ICCL, 0x00000049);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_IMSC, 0xffffffff);
+  mmio_region_write32(isp_wrapper->base_addr, MI_IMSC, 0xffffffff);
+  mmio_region_write32(isp_wrapper->base_addr, VI_CCL, 0x00000002);
+  mmio_region_write32(isp_wrapper->base_addr, VI_ICCL, 0x00000059);
   mmio_region_write32(isp_wrapper->base_addr, VI_IRCL, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00206010);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_PROP, 0x00040011);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_OFFS, 0x00000002);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_OFFS, 0x00000002);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_SIZE, 0x00000140);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_SIZE, 0x000000f0);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_TOTAL_IN, 0x00ad3f05);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_ACT_IN, 0x00510144);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FP_IN, 0x0d6e000f);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_BP_IN, 0x028b8004);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_W_IN, 0x0bad0001);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_IN, 0x04a1415b);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_STD_IN, 0x00002a97);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_RANDOM_SEED, 0x4d777439);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FRAME_NUM, 0x00000001);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FRAME_RATE, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_OFFS, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_OFFS, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_SIZE, frame_width);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_SIZE, frame_height);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_TOTAL_IN, 0x011d8518);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_ACT_IN, 0x00a001e0);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FP_IN, 0x001c8126);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_BP_IN, 0x00454129);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_W_IN, 0x001bc0e9);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_IN, 0x003540a0);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_STD_IN, 0x00000050);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_RANDOM_SEED, 0xe30ce95f);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FRAME_NUM, 0x00000003);
   mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_OFFS, 0x00000000);
   mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_OFFS, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_SIZE, 0x00000140);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_SIZE, 0x000000f0);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_BASE, 0x00010001);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_NUM, 0x01580393);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_SIZE, frame_width);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_SIZE, frame_height);
   mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_CTRL, 0x00000000);
   mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_A_FIXED, 0x00000000);
   mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_B_FIXED, 0x00000000);
   mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_C_FIXED, 0x00000000);
   mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_D_FIXED, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_CONF, 0x80000001);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_OFFSET, 0x00000020);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_OFFSET, 0x00000028);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_SIZE, 0x00000030);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_SIZE, 0x00000036);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_DGAIN_RB, 0x011a00d1);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_DGAIN_G, 0x01260109);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_DEMOSAIC, 0x00000414);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_MODE, 0x00000692);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_BL0, 0x00000167);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_BL1, 0x00000142);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_SH0, 0x00000177);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_SH1, 0x000001c7);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_LUM_WEIGHT, 0x0006698a);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH1, 0x00000032);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH0, 0x00000023);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_MID, 0x00000019);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BL0, 0x0000000f);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BL1, 0x00000006);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_CTRL, 0x0000000a);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_COUNT_START, 0x00a200a2);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_A, 0x00170118);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_B, 0x01d101ed);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_C, 0x01c100f8);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_X_NORM, 0x00020005);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_Y_NORM, 0x00050019);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_MODE, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_0, 0x000002f4);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_1, 0x0000024e);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_2, 0x00000083);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_3, 0x000001af);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_4, 0x00000346);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_5, 0x000000a5);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_6, 0x00000304);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_7, 0x00000111);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_8, 0x000003b9);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_9, 0x00000383);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_10, 0x00000018);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_11, 0x0000028c);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_12, 0x0000001e);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_13, 0x00000087);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_14, 0x00000047);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_15, 0x000001a4);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_16, 0x000002bc);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_PROP, 0x80000007);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_OFFS, 0x0000011c);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_OFFS, 0x000000c1);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_SIZE, 0x0000001e);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_SIZE, 0x00000078);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_FRAMES, 0x00000002);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_REF, 0x0000c2e6);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_THRESH, 0x8ef9ad1e);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_0, 0x00000026);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_1, 0x0000004b);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_2, 0x0000000f);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_3, 0x000001ea);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_4, 0x000001d6);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_5, 0x00000040);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_6, 0x00000040);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_7, 0x000001ca);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_8, 0x000001f6);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_CONF, 0x00000001);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_OFFSET, 0x000000d3);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_OFFSET, 0x00000017);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_SIZE, 0x00000043);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_SIZE, 0x00000048);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_DGAIN_RB, 0x01a200d7);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_DGAIN_G, 0x00f9011e);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_DEMOSAIC, 0x000004f6);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_MODE, 0x00000810);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_BL0, 0x00000230);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_BL1, 0x00000018);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_SH0, 0x00000287);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_SH1, 0x000003f2);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_LUM_WEIGHT, 0x00061fdc);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH1, 0x00000031);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH0, 0x00000031);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_MID, 0x0000002c);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BL0, 0x0000001a);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BL1, 0x00000016);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_CTRL, 0x00000004);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_COUNT_START, 0x00f00140);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_A, 0x01160187);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_B, 0x005f004c);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_C, 0x0138017a);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_X_NORM, 0x00020001);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_Y_NORM, 0x00060015);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_MODE, 0x00000001);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_0, 0x00000170);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_1, 0x00000178);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_2, 0x00000181);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_3, 0x0000018e);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_4, 0x00000194);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_5, 0x000001b4);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_6, 0x000001b7);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_7, 0x000001b9);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_8, 0x000001ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_9, 0x000001ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_10, 0x000001ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_11, 0x000001ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_12, 0x000001ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_13, 0x000001ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_14, 0x000001ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_15, 0x000001ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_16, 0x00000303);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_PROP, 0x00000002);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_OFFS, 0x00000052);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_OFFS, 0x0000016f);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_SIZE, 0x000001be);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_SIZE, 0x00000061);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_FRAMES, 0x00000001);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_REF, 0x0000b0c6);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_THRESH, 0x0b145491);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_0, 0x0000008d);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_1, 0x000000b1);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_2, 0x000000a2);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_3, 0x00000078);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_4, 0x00000169);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_5, 0x000000ba);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_6, 0x0000015c);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_7, 0x000000f8);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_8, 0x0000017c);
   mmio_region_write32(isp_wrapper->base_addr, FORMAT_CONV_CTRL, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_0, 0x000000dd);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_1, 0x000007c6);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_2, 0x000007df);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_3, 0x000007bf);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_4, 0x000000ec);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_0, 0x000005ff);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_1, 0x00000707);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_2, 0x00000464);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_3, 0x00000008);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_4, 0x00000058);
   mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_5, 0x000007de);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_6, 0x00000002);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_7, 0x000007ae);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_8, 0x000000e0);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_R, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_G, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_B, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_IMSC, 0x00000020);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ICR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ISR, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_6, 0x00000241);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_7, 0x000006ff);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_8, 0x0000007d);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_R, 0x000005ec);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_G, 0x00000d7e);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_B, 0x00000dd7);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_IMSC, 0x000400fc);
   mmio_region_write32(isp_wrapper->base_addr, ISP_ERR_CLR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HY, 0x00008469);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCB, 0x0000a674);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCR, 0x0000fa3d);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VY, 0x0000ef61);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VC, 0x0000f9b7);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HY, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HC, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VY, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VC, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_FORMAT_CONV_CTRL, 0x000000fa);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_BASE_AD_INIT,
                       y_base_ad_init_addr);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_SIZE_INIT, 0x00012c00);
+  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_SIZE_INIT,
+                      frame_width * frame_height);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_OFFS_CNT_INIT, 0x00000000);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_IRQ_OFFS_INIT, 0x00000000);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_CB_BASE_AD_INIT,
@@ -356,184 +324,92 @@
                       cr_base_ad_init_addr);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_CR_SIZE_INIT, 0x00000000);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_CR_OFFS_CNT_INIT, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_IMSC, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_ICR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_ISR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_STATUS_CLR, 0x00000003);
+  mmio_region_write32(isp_wrapper->base_addr, MI_IMSC, 0x000003ff);
+  mmio_region_write32(isp_wrapper->base_addr, MI_STATUS_CLR, 0x00000077);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_BASE_AD_INIT2,
                       y_base_ad_init2_addr);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_CB_BASE_AD_INIT2,
                       cb_base_ad_init2_addr);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_CR_BASE_AD_INIT2,
                       cr_base_ad_init2_addr);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_LLENGTH, 0x00000144);
-  mmio_region_write32(isp_wrapper->base_addr, MI_OUTPUT_ALIGN_FORMAT, 0x00000001);
+  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_LLENGTH, 0x00000140);
+  mmio_region_write32(isp_wrapper->base_addr, MI_OUTPUT_ALIGN_FORMAT,
+                      0x00000401);
   mmio_region_write32(isp_wrapper->base_addr, MI_MP_OUTPUT_FIFO_SIZE, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_WIDTH, 0x00000140);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_HEIGHT, 0x000000f0);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_SIZE, 0x00012c00);
-  mmio_region_write32(isp_wrapper->base_addr, MI_CTRL, 0x003a2808);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_CTRL, 0x00000868);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00207251);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_BASE, 0x00000190);
+  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_WIDTH, frame_width);
+  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_HEIGHT, frame_height);
+  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_SIZE,
+                      frame_width * frame_height);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_CTRL, 0x000001c0);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_SCALE_HY, 0x0000546d);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_SCALE_HCB, 0x0000db23);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_SCALE_HCR, 0x000071b7);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_SCALE_VY, 0x00007803);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_SCALE_VC, 0x00005628);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_PHASE_HY, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_PHASE_HC, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_PHASE_VY, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_PHASE_VC, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_FORMAT_CONV_CTRL,
+                      0x000000fa);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_Y_BASE_AD_INIT, 0x50000000);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_Y_SIZE_INIT, 0x0006c1c0);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_Y_OFFS_CNT_INIT,
+                      0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_Y_LLENGTH, 0x00000128);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_CB_BASE_AD_INIT,
+                      0x5006c800);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_CB_SIZE_INIT, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_CB_OFFS_CNT_INIT,
+                      0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_CR_BASE_AD_INIT,
+                      0x5006c800);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_CR_SIZE_INIT, 0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_CR_OFFS_CNT_INIT,
+                      0x00000000);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_Y_PIC_WIDTH, 0x00000124);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_Y_PIC_HEIGHT, 0x00000176);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_Y_PIC_SIZE, 0x0001b070);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_Y_BASE_AD_INIT2,
+                      0x500d9000);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_CB_BASE_AD_INIT2,
+                      0x50145800);
+  mmio_region_write32(isp_wrapper->base_addr, MI_SP_CR_BASE_AD_INIT2,
+                      0x50145800);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_PROP, 0x40011);
+  mmio_region_write32(isp_wrapper->base_addr, SRSZ_CTRL, 0x000001c0);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00207211);
+  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_CTRL, 0x00000d76);
+  mmio_region_write32(isp_wrapper->base_addr, MI_CTRL, 0x68352808);
   mmio_region_write32(isp_wrapper->base_addr, MI_INIT, 0x000000b0);
   return kDifOk;
 }
 
 // ISP configuration:
+// raw:320x240, byp:320x240
+dif_result_t dif_isp_wrapper_set_raw_320x240_byp_320x240_en(
+    const dif_isp_wrapper_t *isp_wrapper) {
+  return _dif_isp_wrapper_set_raw_byp_en(isp_wrapper, 0x140, 0xf0, 0x5a000000,
+                                         0x5a01a000, 0x5a01a000, 0x5a020000,
+                                         0x5a03a000, 0x5a03a000);
+}
+
+// ISP configuration:
+// raw:320x240, byp:320x240, hps image address: 0x00300000
+dif_result_t dif_isp_wrapper_set_ml_mem_byp_320x240_en(
+    const dif_isp_wrapper_t *isp_wrapper) {
+  return _dif_isp_wrapper_set_raw_byp_en(isp_wrapper, 0x140, 0xf0, 0x5a300000,
+                                         0x5a320000, 0x5a320000, 0x5a340000,
+                                         0x5a360000, 0x5a360000);
+}
+
+// ISP configuration:
 // raw:324x324, byp:324x324
 dif_result_t dif_isp_wrapper_set_raw_324x324_byp_324x324_en(
     const dif_isp_wrapper_t *isp_wrapper) {
-  if (isp_wrapper == NULL) {
-    return kDifBadArg;
-  }
-  mmio_region_write32(isp_wrapper->base_addr, VI_CCL, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, VI_ICCL, 0x00000049);
-  mmio_region_write32(isp_wrapper->base_addr, VI_IRCL, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00206018);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_PROP, 0x00040011);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_OFFS, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_OFFS, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_SIZE, 0x00000144);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_SIZE, 0x00000144);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_TOTAL_IN, 0x00ad3f05);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_ACT_IN, 0x00510144);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FP_IN, 0x0d6e000f);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_BP_IN, 0x028b8004);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_W_IN, 0x0bad0001);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_IN, 0x04a1415b);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_STD_IN, 0x00002a97);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_RANDOM_SEED, 0x4d777439);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FRAME_NUM, 0x00000001);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FRAME_RATE, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_OFFS, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_OFFS, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_SIZE, 0x00000144);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_SIZE, 0x00000144);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_BASE, 0x00010001);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_NUM, 0x01580393);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_CTRL, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_A_FIXED, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_B_FIXED, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_C_FIXED, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_D_FIXED, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_CONF, 0x80000001);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_OFFSET, 0x00000020);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_OFFSET, 0x00000028);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_SIZE, 0x00000030);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_SIZE, 0x00000036);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_DGAIN_RB, 0x011a00d1);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_DGAIN_G, 0x01260109);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_DEMOSAIC, 0x00000414);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_MODE, 0x00000692);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_BL0, 0x00000167);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_BL1, 0x00000142);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_SH0, 0x00000177);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_THRES_SH1, 0x000001c7);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_LUM_WEIGHT, 0x0006698a);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH1, 0x00000032);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH0, 0x00000023);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_MID, 0x00000019);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BL0, 0x0000000f);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BL1, 0x00000006);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_CTRL, 0x0000000a);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_COUNT_START, 0x00a200a2);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_A, 0x00170118);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_B, 0x01d101ed);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_C, 0x01c100f8);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_X_NORM, 0x00020005);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_Y_NORM, 0x00050019);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_MODE, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_0, 0x000002f4);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_1, 0x0000024e);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_2, 0x00000083);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_3, 0x000001af);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_4, 0x00000346);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_5, 0x000000a5);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_6, 0x00000304);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_7, 0x00000111);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_8, 0x000003b9);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_9, 0x00000383);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_10, 0x00000018);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_11, 0x0000028c);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_12, 0x0000001e);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_13, 0x00000087);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_14, 0x00000047);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_15, 0x000001a4);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_16, 0x000002bc);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_PROP, 0x80000007);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_OFFS, 0x0000011c);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_OFFS, 0x000000c1);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_SIZE, 0x0000001e);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_SIZE, 0x00000078);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_FRAMES, 0x00000002);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_REF, 0x0000c2e6);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_THRESH, 0x8ef9ad1e);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_0, 0x00000026);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_1, 0x0000004b);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_2, 0x0000000f);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_3, 0x000001ea);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_4, 0x000001d6);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_5, 0x00000040);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_6, 0x00000040);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_7, 0x000001ca);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_8, 0x000001f6);
-  mmio_region_write32(isp_wrapper->base_addr, FORMAT_CONV_CTRL, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_0, 0x000000dd);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_1, 0x000007c6);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_2, 0x000007df);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_3, 0x000007bf);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_4, 0x000000ec);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_5, 0x000007de);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_6, 0x00000002);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_7, 0x000007ae);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_8, 0x000000e0);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_R, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_G, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_B, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_IMSC, 0x00000020);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ICR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ISR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_ERR_CLR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HY, 0x00008469);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCB, 0x0000a674);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCR, 0x0000fa3d);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VY, 0x0000ef61);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VC, 0x0000f9b7);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HY, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HC, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VY, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VC, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_FORMAT_CONV_CTRL, 0x000000fa);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_BASE_AD_INIT, 0x5a000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_SIZE_INIT, 0x00019f20);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_OFFS_CNT_INIT, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_IRQ_OFFS_INIT, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_CB_BASE_AD_INIT, 0x5a01a000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_CB_SIZE_INIT, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_CB_OFFS_CNT_INIT, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_CR_BASE_AD_INIT, 0x5a01a000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_CR_SIZE_INIT, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_CR_OFFS_CNT_INIT, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_IMSC, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_ICR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_ISR, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_STATUS_CLR, 0x00000003);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_BASE_AD_INIT2, 0x5a034000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_CB_BASE_AD_INIT2, 0x5a04e000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_CR_BASE_AD_INIT2, 0x5a04e000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_LLENGTH, 0x00000144);
-  mmio_region_write32(isp_wrapper->base_addr, MI_OUTPUT_ALIGN_FORMAT, 0x00000001);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_OUTPUT_FIFO_SIZE, 0x00000000);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_WIDTH, 0x00000144);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_HEIGHT, 0x00000144);
-  mmio_region_write32(isp_wrapper->base_addr, MI_MP_Y_PIC_SIZE, 0x00019a10);
-  mmio_region_write32(isp_wrapper->base_addr, MI_CTRL, 0x003a2808);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_CTRL, 0x00000868);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00207259);
-  mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_BASE, 0x00000190);
-  mmio_region_write32(isp_wrapper->base_addr, MI_INIT, 0x000000b0);
-  return kDifOk;
+  return _dif_isp_wrapper_set_raw_byp_en(isp_wrapper, 0x144, 0x144, 0x5a000000,
+                                         0x5a01a000, 0x5a01a000, 0x5a034000,
+                                         0x5a04e000, 0x5a04e000);
 }
 
 dif_result_t dif_isp_wrapper_clear_en(const dif_isp_wrapper_t *isp_wrapper) {

diff --git a/sw/device/lib/dif/dif_isp_wrapper.h b/sw/device/lib/dif/dif_isp_wrapper.h
index 761eafc..3730cfd 100644
--- a/sw/device/lib/dif/dif_isp_wrapper.h
+++ b/sw/device/lib/dif/dif_isp_wrapper.h

@@ -39,11 +39,6 @@
     const dif_isp_wrapper_t *isp_wrapper);
 dif_result_t dif_isp_wrapper_set_ml_mem_byp_320x240_en(
     const dif_isp_wrapper_t *isp_wrapper);
-dif_result_t _dif_isp_wrapper_set_raw_320x240_byp_320x240_en(
-    const dif_isp_wrapper_t *isp_wrapper, const uint32_t y_base_ad_init_addr,
-    const uint32_t cb_base_ad_init_addr, const uint32_t cr_base_ad_init_addr,
-    const uint32_t y_base_ad_init2_addr, const uint32_t cb_base_ad_init2_addr,
-    const uint32_t cr_base_ad_init2_addr);
 dif_result_t dif_isp_wrapper_set_raw_324x324_byp_324x324_en(
     const dif_isp_wrapper_t *isp_wrapper);
 

diff --git a/util/run_live_cam.py b/util/run_live_cam.py
index be825c0..b95da87 100644
--- a/util/run_live_cam.py
+++ b/util/run_live_cam.py

@@ -12,22 +12,22 @@
 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 # See the License for the specific language governing permissions and
 # limitations under the License.
-"""
-Run a live camera stream from Nexus board
+"""Run a live camera stream from Nexus board
 """
 
 import argparse
 from datetime import datetime
 from functools import reduce
 import re
-import serial
 import subprocess
+import serial
 from PIL import Image, ImageDraw, ImageFont
 
 
 def main():
     """Args:
       smc_uart_port: SMC uart port
+      usb_serial: USB serial
       baudrate: Baud rate of smc uart
       input_shape: Input image shape
       input_mode: Input image mode
@@ -35,10 +35,9 @@
     parser = argparse.ArgumentParser(
         description='Generate inputs for ML models.')
     parser.add_argument("--smc_uart_port",
-                        "-p",
-                        dest='port',
                         required=True,
                         help="SMC uart port")
+    parser.add_argument("--usb_serial", required=True, help="USB serial")
     parser.add_argument("--baudrate",
                         "-b",
                         default=115200,
@@ -58,7 +57,7 @@
     parser.add_argument("--opentitantool_conf", type=str, required=True)
     args = parser.parse_args()
 
-    ser = serial.Serial(port=args.port, baudrate=args.baudrate)
+    ser = serial.Serial(port=args.smc_uart_port, baudrate=args.baudrate)
 
     while True:
         line = ser.readline()
@@ -71,17 +70,17 @@
         address = re.search(r"\[SMC\] Start of a frame, address (\d+)\.",
                            line.decode())
         if address:
-          address = address.groups(1)[0]
+            address = address.groups(1)[0]
         else:
-          continue
+            continue
         current_time = datetime.now().strftime("%Y-%m-%d %H:%M:%S")
         print("Start loading the frame")
         # Load the frame from uart
         byte_size = str(reduce(lambda x, y: x * y, args.input_shape))
         byte_str = subprocess.check_output([
             args.opentitantool_bin, '--conf', args.opentitantool_conf,
-            '--interface', 'nexus', 'spi', 'read-memory', '--length',
-            byte_size, '--start', address
+            '--interface', 'nexus', '--usb-serial', args.usb_serial, 'spi',
+            'read-memory', '--length', byte_size, '--start', address
         ])
 
         im_obj = Image.frombytes(mode=args.input_mode,