| // Copyright 2022 Google LLC. |
| // Copyright lowRISC contributors. |
| // Licensed under the Apache License, Version 2.0, see LICENSE for details. |
| // SPDX-License-Identifier: Apache-2.0 |
| |
| #include "sw/device/lib/dif/dif_isp_wrapper.h" |
| |
| #include <stddef.h> |
| |
| #include "sw/device/lib/base/bitfield.h" |
| #include "sw/device/lib/base/macros.h" |
| #include "sw/device/lib/dif/dif_base.h" |
| |
| #include "external/isp/isppico/simulator_linux/code_sample/includeISP/isp_wrapper_register_address.h" |
| #include "isp_wrapper_regs.h" // Generated. |
| |
| // ISP configuration: |
| // size: 120 * 64, colar bar, force triggering interrupts(isp_irq and mi_irq) |
| dif_result_t dif_isp_wrapper_set_en(const dif_isp_wrapper_t *isp_wrapper) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| |
| mmio_region_write32(isp_wrapper->base_addr, ISP1_BASE_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_ICCL, 0x00000049); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_IRCL, 0x00000000); |
| |
| // Setup ACQ |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BASE_ADDR, 0x00206016); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_PROP, 0x00000011); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_SIZE, 0x00000078); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_SIZE, 0x00000040); |
| |
| // Setup TPG |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_TOTAL_IN_ADDR, 0x00d9c054); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_ACT_IN_ADDR, 0x001e0040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FP_IN_ADDR, 0x002e400f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_BP_IN_ADDR, 0x00484004); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_W_IN_ADDR, 0x00454001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_IN_ADDR, 0x000a0015); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_STD_IN_ADDR, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_RANDOM_SEED_ADDR, 0x4d777439); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FRAME_NUM_ADDR, 0x00000003); |
| |
| // Setup Frame |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FRAME_RATE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_SIZE, 0x00000078); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_SIZE, 0x00000040); |
| |
| // Setup Binning |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_SIZE, 0x00010001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_NUM, 0x01580393); |
| |
| // Setup BLS |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_CTRL, 0x00000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_A_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_B_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_C_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_D_FIXED, 0x00000000); |
| |
| // Setup EXP |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_CONF, 0x80000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_OFFSET, 0x0000000c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_OFFSET, 0x00000008); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_SIZE, 0x00000015); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_SIZE, 0x00000008); |
| |
| // Setup DGAIN |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DIGITAL_GAIN_RB, 0x011a0109); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DIGITAL_GAIN_G, 0x01260109); |
| |
| // Setup DEMOSAIC |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DEMOSAIC, 0x00000004); |
| |
| // Setup FILT |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_MODE, 0x000003f3); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_BLUR_THR_0, 0x0000001a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_BLUR_THR_1, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_SH_0_THR, 0x00000029); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_SH_1_THR, 0x00000043); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_LUM_WEIGHT, 0x00032040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH_1, 0x0000000c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH_0, 0x0000000a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_MID, 0x00000008); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BLUR, 0x00000004); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BLUR_MAX, 0x00000000); |
| |
| // Setup CAC |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_CTRL, 0x0000000c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_COUNT_START, 0x0020003c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_A, 0x002b01e5); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_B, 0x01f10014); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_C, 0x01fa0000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_X_NORM, 0x00050010); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_Y_NORM, 0x00050010); |
| |
| |
| // Setup GAMMA OUT |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_MODE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_0, 0x000000f6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_1, 0x00000252); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_2, 0x000000c9); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_3, 0x000000db); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_4, 0x00000036); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_5, 0x00000269); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_6, 0x0000008a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_7, 0x00000299); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_8, 0x00000217); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_9, 0x00000118); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_10, 0x000001d1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_11, 0x000003ed); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_12, 0x000001c1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_13, 0x000000f8); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_14, 0x0000026a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_15, 0x000002f4); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_16, 0x0000024e); |
| |
| // Setup AWB |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_PROP, 0x80000006); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_OFFS, 0x00000060); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_OFFS, 0x0000002f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_SIZE, 0x00000009); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_SIZE, 0x0000000d); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_FRAMES, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_REF, 0x0000a504); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_THRESH, 0x11b98318); |
| |
| |
| // Setup CSM |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_0, 0x00000026); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_1, 0x0000004b); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_2, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_3, 0x000001ea); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_4, 0x000001d6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_5, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_6, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_7, 0x000001ca); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_8 , 0x000001f6); |
| |
| // Setup FORMAT_CONV |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FORMAT_CONV_CTRL, 0x00000000); |
| |
| |
| // Setup CT |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_0, 0x000000dd); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_1, 0x000007c6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_2, 0x000007df); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_3, 0x000007bf); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_4, 0x000000ec); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_5, 0x000007de); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_6, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_7, 0x000007ae); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_8, 0x000000e0); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_R, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_G, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_B, 0x00000000); |
| |
| mmio_region_write32(isp_wrapper->base_addr, ISP_IMSC, 0x0004007c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ICR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ISR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ERR_CLR, 0x00000001); |
| |
| |
| // Setup MRSZ |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HY_ADDR, 0x00008c10); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCB_ADDR, 0x000041f5); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCR_ADDR, 0x0000604f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VY_ADDR, 0x0000bad1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VC_ADDR, 0x0000d46c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HY_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VY_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_FORMAT_CONV_CTRL_ADDR, 0x0000006a); |
| |
| // Setup MI_MP |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_BASE_AD_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_SIZE_INIT_ADDR, 0x00001e00); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_IRQ_OFFS_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_BASE_AD_INIT_ADDR, 0x00002000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_SIZE_INIT_ADDR, 0x00001e00); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_BASE_AD_INIT_ADDR, 0x00004000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_SIZE_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_OFFS_CNT_INIT_ADDR, 0x00000000); |
| |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_IMSC_ADDR, 0x0000007d); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ICR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ISR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_STATUS_CLR_ADDR , 0x00000000); |
| |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_BASE_AD_INIT2_ADDR, 0x00008000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_BASE_AD_INIT2_ADDR, 0x0000a000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_BASE_AD_INIT2_ADDR, 0x0000c000); |
| |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_LLENGTH_ADDR, 0x00000078); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_OUTPUT_ALIGN_FORMAT, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_OUTPUT_FIFO_SIZE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_WIDTH_ADDR, 0x00000078); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_HEIGHT_ADDR, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_SIZE_ADDR, 0x00001e00); |
| |
| // Init MI |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_CTRL_ADDR, 0x007a2801); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_CTRL_ADDR, 0x00000c63); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00207257); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_CTRL_ADDR, 0x00000120); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_INIT_ADDR, 0x00000050); |
| return kDifOk; |
| } |
| |
| // ISP configuration: |
| // size: 64 * 64, TPG(test pattern generation mode) |
| dif_result_t dif_isp_wrapper_set_tpg_64_64_en(const dif_isp_wrapper_t *isp_wrapper) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_CCL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_ICCL, 0x00000049); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_IRCL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00206016); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_PROP, 0x00000011); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_SIZE, 0x00000080); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_SIZE, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_TOTAL_IN_ADDR, 0x00d1c054); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_ACT_IN_ADDR, 0x00200040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FP_IN_ADDR, 0x003e400f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_BP_IN_ADDR, 0x002e4004); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_W_IN_ADDR, 0x00454001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_IN_ADDR, 0x000a8015); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_STD_IN_ADDR, 0x00000010); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_RANDOM_SEED_ADDR, 0x4d777439); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FRAME_NUM_ADDR, 0x00000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FRAME_RATE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_SIZE, 0x00000080); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_SIZE, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_SIZE, 0x00010001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_NUM, 0x01580393); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_CTRL, 0x00000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_A_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_B_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_C_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_D_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_CONF, 0x80000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_OFFSET, 0x00000017); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_OFFSET, 0x0000001e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_SIZE, 0x00000013); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_SIZE, 0x00000006); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DIGITAL_GAIN_RB, 0x011a0109); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DIGITAL_GAIN_G, 0x01260109); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DEMOSAIC, 0x00000004); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_MODE, 0x000003f3); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_BLUR_THR_0, 0x0000001a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_BLUR_THR_1, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_SH_0_THR, 0x00000029); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_SH_1_THR, 0x00000043); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_LUM_WEIGHT, 0x00032040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH_1, 0x0000000c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH_0, 0x0000000a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_MID, 0x00000008); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BLUR, 0x00000004); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BLUR_MAX, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_CTRL, 0x0000000c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_COUNT_START, 0x00200040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_A, 0x002b01e5); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_B, 0x01f10014); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_C, 0x01fa0000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_X_NORM, 0x00050010); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_Y_NORM, 0x00050010); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_MODE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_0, 0x000000f6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_1, 0x00000252); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_2, 0x000000c9); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_3, 0x000000db); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_4, 0x00000036); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_5, 0x00000269); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_6, 0x0000008a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_7, 0x00000299); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_8, 0x00000217); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_9, 0x00000118); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_10, 0x000001d1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_11, 0x000003ed); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_12, 0x000001c1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_13, 0x000000f8); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_14, 0x0000026a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_15, 0x000002f4); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_16, 0x0000024e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_PROP, 0x80000006); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_OFFS, 0x00000074); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_OFFS, 0x00000021); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_SIZE, 0x00000006); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_SIZE, 0x00000010); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_FRAMES, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_REF, 0x0000a504); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_THRESH, 0x11b98318); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_0, 0x00000026); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_1, 0x0000004b); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_2, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_3, 0x000001ea); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_4, 0x000001d6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_5, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_6, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_7, 0x000001ca); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_8, 0x000001f6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FORMAT_CONV_CTRL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_0, 0x000000dd); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_1, 0x000007c6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_2, 0x000007df); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_3, 0x000007bf); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_4, 0x000000ec); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_5, 0x000007de); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_6, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_7, 0x000007ae); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_8, 0x000000e0); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_R, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_G, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_B, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_IMSC, 0x0004007c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ICR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ISR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ERR_CLR, 0x00000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HY_ADDR, 0x00007efe); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCB_ADDR, 0x00007df8); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCR_ADDR, 0x00007df8); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VY_ADDR, 0x00008c10); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VC_ADDR, 0x0000bad1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HY_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VY_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_FORMAT_CONV_CTRL_ADDR, 0x0000006a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_BASE_AD_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_SIZE_INIT_ADDR, 0x00001000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_IRQ_OFFS_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_BASE_AD_INIT_ADDR, 0x00001000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_SIZE_INIT_ADDR, 0x00001000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_BASE_AD_INIT_ADDR, 0x00002000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_SIZE_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_IMSC_ADDR, 0x0000007d); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ICR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ISR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_STATUS_CLR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_BASE_AD_INIT2_ADDR, 0x00004000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_BASE_AD_INIT2_ADDR, 0x00005000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_BASE_AD_INIT2_ADDR, 0x00006000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_LLENGTH_ADDR, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_OUTPUT_ALIGN_FORMAT, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_OUTPUT_FIFO_SIZE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_WIDTH_ADDR, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_HEIGHT_ADDR, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_SIZE_ADDR, 0x00001000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_CTRL_ADDR, 0x007a2801); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_CTRL_ADDR, 0x00000c63); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00207257); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_CTRL_ADDR, 0x00000103); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_INIT_ADDR, 0x00000050); |
| return kDifOk; |
| } |
| |
| // ISP configuration: |
| // raw:320x240, byp:320x240 |
| dif_result_t dif_isp_wrapper_set_raw_320x240_byp_320x240_en( |
| const dif_isp_wrapper_t *isp_wrapper) { |
| return _dif_isp_wrapper_set_raw_320x240_byp_320x240_en( |
| isp_wrapper, 0x0, 0x0001a000, 0x0001a000, 0x00020000, 0x0003a000, |
| 0x0003a000); |
| } |
| |
| // ISP configuration: |
| // raw:320x240, byp:320x240, hps image address: 0x00300000 |
| dif_result_t dif_isp_wrapper_set_ml_mem_byp_320x240_en( |
| const dif_isp_wrapper_t *isp_wrapper) { |
| return _dif_isp_wrapper_set_raw_320x240_byp_320x240_en( |
| isp_wrapper, 0x00300000, 0x00320000, 0x00320000, 0x00340000, 0x00360000, |
| 0x00360000); |
| } |
| |
| // TODO(ykwang): Remove the code duplication in this library. Use a config |
| // variable to describe which field to set and implement an initialization |
| // to setup ISP with the config. Unify all *_en functions in this library. |
| dif_result_t _dif_isp_wrapper_set_raw_320x240_byp_320x240_en( |
| const dif_isp_wrapper_t *isp_wrapper, |
| // TODO(ykwang): put these variables into a config variable. |
| const uint32_t y_base_ad_init_addr, const uint32_t cb_base_ad_init_addr, |
| const uint32_t cr_base_ad_init_addr, const uint32_t y_base_ad_init2_addr, |
| const uint32_t cb_base_ad_init2_addr, |
| const uint32_t cr_base_ad_init2_addr) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_CCL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_ICCL, 0x00000049); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_IRCL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00206010); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_PROP, 0x00040011); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_OFFS, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_OFFS, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_SIZE, 0x00000140); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_SIZE, 0x000000f0); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_TOTAL_IN_ADDR, 0x00ad3f05); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_ACT_IN_ADDR, 0x00510144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FP_IN_ADDR, 0x0d6e000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_BP_IN_ADDR, 0x028b8004); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_W_IN_ADDR, 0x0bad0001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_IN_ADDR, 0x04a1415b); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_STD_IN_ADDR, 0x00002a97); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_RANDOM_SEED_ADDR, 0x4d777439); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FRAME_NUM_ADDR, 0x00000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FRAME_RATE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_SIZE, 0x00000140); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_SIZE, 0x000000f0); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_SIZE, 0x00010001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_NUM, 0x01580393); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_CTRL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_A_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_B_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_C_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_D_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_CONF, 0x80000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_OFFSET, 0x00000020); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_OFFSET, 0x00000028); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_SIZE, 0x00000030); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_SIZE, 0x00000036); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DIGITAL_GAIN_RB, 0x011a00d1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DIGITAL_GAIN_G, 0x01260109); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DEMOSAIC, 0x00000414); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_MODE, 0x00000692); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_BLUR_THR_0, 0x00000167); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_BLUR_THR_1, 0x00000142); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_SH_0_THR, 0x00000177); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_SH_1_THR, 0x000001c7); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_LUM_WEIGHT, 0x0006698a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH_1, 0x00000032); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH_0, 0x00000023); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_MID, 0x00000019); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BLUR, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BLUR_MAX, 0x00000006); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_CTRL, 0x0000000a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_COUNT_START, 0x00a200a2); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_A, 0x00170118); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_B, 0x01d101ed); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_C, 0x01c100f8); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_X_NORM, 0x00020005); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_Y_NORM, 0x00050019); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_MODE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_0, 0x000002f4); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_1, 0x0000024e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_2, 0x00000083); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_3, 0x000001af); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_4, 0x00000346); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_5, 0x000000a5); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_6, 0x00000304); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_7, 0x00000111); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_8, 0x000003b9); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_9, 0x00000383); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_10, 0x00000018); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_11, 0x0000028c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_12, 0x0000001e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_13, 0x00000087); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_14, 0x00000047); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_15, 0x000001a4); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_16, 0x000002bc); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_PROP, 0x80000007); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_OFFS, 0x0000011c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_OFFS, 0x000000c1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_SIZE, 0x0000001e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_SIZE, 0x00000078); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_FRAMES, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_REF, 0x0000c2e6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_THRESH, 0x8ef9ad1e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_0, 0x00000026); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_1, 0x0000004b); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_2, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_3, 0x000001ea); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_4, 0x000001d6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_5, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_6, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_7, 0x000001ca); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_8, 0x000001f6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FORMAT_CONV_CTRL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_0, 0x000000dd); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_1, 0x000007c6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_2, 0x000007df); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_3, 0x000007bf); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_4, 0x000000ec); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_5, 0x000007de); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_6, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_7, 0x000007ae); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_8, 0x000000e0); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_R, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_G, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_B, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_IMSC, 0x00000020); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ICR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ISR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ERR_CLR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HY_ADDR, 0x00008469); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCB_ADDR, 0x0000a674); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCR_ADDR, 0x0000fa3d); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VY_ADDR, 0x0000ef61); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VC_ADDR, 0x0000f9b7); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HY_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VY_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_FORMAT_CONV_CTRL_ADDR, 0x000000fa); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_BASE_AD_INIT_ADDR, |
| y_base_ad_init_addr); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_SIZE_INIT_ADDR, 0x00012c00); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_IRQ_OFFS_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_BASE_AD_INIT_ADDR, |
| cb_base_ad_init_addr); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_SIZE_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_BASE_AD_INIT_ADDR, |
| cr_base_ad_init_addr); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_SIZE_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_IMSC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ICR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ISR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_STATUS_CLR_ADDR, 0x00000003); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_BASE_AD_INIT2_ADDR, |
| y_base_ad_init2_addr); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_BASE_AD_INIT2_ADDR, |
| cb_base_ad_init2_addr); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_BASE_AD_INIT2_ADDR, |
| cr_base_ad_init2_addr); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_LLENGTH_ADDR, 0x00000144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_OUTPUT_ALIGN_FORMAT, 0x00000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_OUTPUT_FIFO_SIZE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_WIDTH_ADDR, 0x00000140); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_HEIGHT_ADDR, 0x000000f0); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_SIZE_ADDR, 0x00012c00); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_CTRL_ADDR, 0x003a2808); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_CTRL_ADDR, 0x00000868); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00207251); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_CTRL_ADDR, 0x00000190); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_INIT_ADDR, 0x000000b0); |
| return kDifOk; |
| } |
| |
| // ISP configuration: |
| // raw:324x324, byp:324x324 |
| dif_result_t dif_isp_wrapper_set_raw_324x324_byp_324x324_en( |
| const dif_isp_wrapper_t *isp_wrapper) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_CCL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_ICCL, 0x00000049); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_VI_IRCL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00206018); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_PROP, 0x00040011); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_H_SIZE, 0x00000144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ACQ_V_SIZE, 0x00000144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_TOTAL_IN_ADDR, 0x00ad3f05); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_ACT_IN_ADDR, 0x00510144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FP_IN_ADDR, 0x0d6e000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_BP_IN_ADDR, 0x028b8004); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_W_IN_ADDR, 0x0bad0001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_IN_ADDR, 0x04a1415b); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_GAP_STD_IN_ADDR, 0x00002a97); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_RANDOM_SEED_ADDR, 0x4d777439); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_FRAME_NUM_ADDR, 0x00000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FRAME_RATE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_OFFS, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_H_SIZE, 0x00000144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_OUT_V_SIZE, 0x00000144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_SIZE, 0x00010001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BINNING_NUM, 0x01580393); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_CTRL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_A_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_B_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_C_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_BLS_D_FIXED, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_CONF, 0x80000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_OFFSET, 0x00000020); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_OFFSET, 0x00000028); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_H_SIZE, 0x00000030); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_EXP_V_SIZE, 0x00000036); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DIGITAL_GAIN_RB, 0x011a00d1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DIGITAL_GAIN_G, 0x01260109); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_DEMOSAIC, 0x00000414); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_MODE, 0x00000692); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_BLUR_THR_0, 0x00000167); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_BLUR_THR_1, 0x00000142); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_SH_0_THR, 0x00000177); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_SH_1_THR, 0x000001c7); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_LUM_WEIGHT, 0x0006698a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH_1, 0x00000032); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_SH_0, 0x00000023); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_MID, 0x00000019); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BLUR, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FILT_FAC_BLUR_MAX, 0x00000006); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_CTRL, 0x0000000a); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_COUNT_START, 0x00a200a2); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_A, 0x00170118); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_B, 0x01d101ed); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_C, 0x01c100f8); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_X_NORM, 0x00020005); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CAC_Y_NORM, 0x00050019); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_MODE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_0, 0x000002f4); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_1, 0x0000024e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_2, 0x00000083); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_3, 0x000001af); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_4, 0x00000346); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_5, 0x000000a5); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_6, 0x00000304); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_7, 0x00000111); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_8, 0x000003b9); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_9, 0x00000383); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_10, 0x00000018); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_11, 0x0000028c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_12, 0x0000001e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_13, 0x00000087); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_14, 0x00000047); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_15, 0x000001a4); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_GAMMA_OUT_Y_16, 0x000002bc); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_PROP, 0x80000007); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_OFFS, 0x0000011c); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_OFFS, 0x000000c1); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_H_SIZE, 0x0000001e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_V_SIZE, 0x00000078); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_FRAMES, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_REF, 0x0000c2e6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_AWB_THRESH, 0x8ef9ad1e); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_0, 0x00000026); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_1, 0x0000004b); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_2, 0x0000000f); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_3, 0x000001ea); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_4, 0x000001d6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_5, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_6, 0x00000040); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_7, 0x000001ca); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CC_COEFF_8, 0x000001f6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_FORMAT_CONV_CTRL, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_0, 0x000000dd); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_1, 0x000007c6); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_2, 0x000007df); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_3, 0x000007bf); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_4, 0x000000ec); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_5, 0x000007de); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_6, 0x00000002); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_7, 0x000007ae); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_COEFF_8, 0x000000e0); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_R, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_G, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CT_OFFSET_B, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_IMSC, 0x00000020); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ICR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ISR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ERR_CLR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HY_ADDR, 0x00008469); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCB_ADDR, 0x0000a674); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_HCR_ADDR, 0x0000fa3d); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VY_ADDR, 0x0000ef61); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_SCALE_VC_ADDR, 0x0000f9b7); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HY_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_HC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VY_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_PHASE_VC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_FORMAT_CONV_CTRL_ADDR, 0x000000fa); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_BASE_AD_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_SIZE_INIT_ADDR, 0x00019f20); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_IRQ_OFFS_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_BASE_AD_INIT_ADDR, 0x0001a000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_SIZE_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_BASE_AD_INIT_ADDR, 0x0001a000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_SIZE_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_OFFS_CNT_INIT_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_IMSC_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ICR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ISR_ADDR, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_STATUS_CLR_ADDR, 0x00000003); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_BASE_AD_INIT2_ADDR, 0x00034000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CB_BASE_AD_INIT2_ADDR, 0x0004e000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_CR_BASE_AD_INIT2_ADDR, 0x0004e000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_LLENGTH_ADDR, 0x00000144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_OUTPUT_ALIGN_FORMAT, 0x00000001); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_OUTPUT_FIFO_SIZE, 0x00000000); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_WIDTH_ADDR, 0x00000144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_HEIGHT_ADDR, 0x00000144); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_MP_Y_PIC_SIZE_ADDR, 0x00019a10); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_CTRL_ADDR, 0x003a2808); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_TPG_CTRL_ADDR, 0x00000868); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_CTRL, 0x00207259); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MRSZ_CTRL_ADDR, 0x00000190); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_INIT_ADDR, 0x000000b0); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_clear_en(const dif_isp_wrapper_t *isp_wrapper) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| //TODO(Ray): not used currently, will update to real interrupt clear registers |
| mmio_region_write32(isp_wrapper->base_addr, 0xb00, 0x00040000); |
| return kDifOk; |
| } |
| |
| // TODO(ykwang): replace mask function with done which clears status registers. |
| dif_result_t dif_isp_wrapper_isp_irq_mask(const dif_isp_wrapper_t *isp_wrapper) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| //ISP_IMSC Interrupt mask, 0 active |
| mmio_region_write32(isp_wrapper->base_addr, 0xb00, 0x00000000); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_mi_irq_mask(const dif_isp_wrapper_t *isp_wrapper) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| //MI_IMSC Interrupt mask, 0 active |
| mmio_region_write32(isp_wrapper->base_addr, 0xef8, 0x00000000); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_isp_irq_done( |
| const dif_isp_wrapper_t *isp_wrapper) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| uint32_t irq_status = mmio_region_read32(isp_wrapper->base_addr, ISP_MIS); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ICR, irq_status); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_mi_irq_done(const dif_isp_wrapper_t *isp_wrapper) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| uint32_t irq_status = |
| mmio_region_read32(isp_wrapper->base_addr, ISP_MI_MIS_ADDR); |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ICR_ADDR, irq_status); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_read_en(const dif_isp_wrapper_t *isp_wrapper, |
| uint32_t *result) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| //MI_MIS Masked Interrupt Status |
| *result = mmio_region_read32(isp_wrapper->base_addr, 0xf00); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_read_mi_mis(const dif_isp_wrapper_t *isp_wrapper, uint32_t *result) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| *result = mmio_region_read32(isp_wrapper->base_addr, ISP_MI_MIS_ADDR); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_read_isp_mis(const dif_isp_wrapper_t *isp_wrapper, uint32_t *result) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| *result = mmio_region_read32(isp_wrapper->base_addr, ISP_MIS); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_write_isp_icr(const dif_isp_wrapper_t *isp_wrapper, uint32_t val) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| mmio_region_write32(isp_wrapper->base_addr, ISP_ICR, val); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_isp_wrapper_write_mi_icr(const dif_isp_wrapper_t *isp_wrapper, uint32_t val) { |
| if (isp_wrapper == NULL) { |
| return kDifBadArg; |
| } |
| mmio_region_write32(isp_wrapper->base_addr, ISP_MI_ICR_ADDR, val); |
| return kDifOk; |
| } |
