blob: d193d3749295f0abd95e546cebf9bc8faebdb3bd [file] [log] [blame]
// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
{
// TODO: flow and sub_flow should not needed here. Update dvsim to support it.
flow: formal
sub_flow: fpv
// This is the primary cfg hjson for FPV. It imports ALL individual FPV
// cfgs of the IPs and the full chip used in top_matcha. This enables to run
// them all as a regression in one shot.
name: top_matcha_batch_fpv
import_cfgs: [// common server configuration for results upload
"{proj_root}/hw/data/common_project_cfg.hjson"]
use_cfgs: [// TODO: implement some switch to only select "_tb" testbenches
// TODO: if we default "_tb" cov to be on, and the rest of the tbs cov off, need a
// command-line switch to disable cov.
{
name: alert_handler_esc_timer_fpv
dut: alert_handler_esc_timer_tb
fusesoc_core: lowrisc:opentitan:top_matcha_alert_handler_esc_timer_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/top_matcha/ip_autogen/alert_handler/alert_handler_esc_timer/{sub_flow}/{tool}"
cov: true
}
{
name: alert_handler_ping_timer_fpv
dut: alert_handler_ping_timer_tb
fusesoc_core: lowrisc:opentitan:top_matcha_alert_handler_ping_timer_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/top_matcha/ip_autogen/alert_handler/alert_handler/ping_timer/{sub_flow}/{tool}"
cov: true
}
{
name: prim_arbiter_ppc_fpv
dut: prim_arbiter_ppc_tb
fusesoc_core: lowrisc:fpv:prim_arbiter_ppc_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_arbiter_ppc/{sub_flow}/{tool}"
cov: true
}
{
name: prim_arbiter_tree_fpv
dut: prim_arbiter_tree_tb
fusesoc_core: lowrisc:fpv:prim_arbiter_tree_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_arbiter_tree/{sub_flow}/{tool}"
cov: true
}
{
name: prim_arbiter_fixed_fpv
dut: prim_arbiter_fixed_tb
fusesoc_core: lowrisc:fpv:prim_arbiter_fixed_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_arbiter_fix/{sub_flow}/{tool}"
cov: true
}
{
name: prim_dup_up_count_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 0", "-define CntStyle DupCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
// TODO: turn on coverage once design finalizes on issue #8343.
cov: false
}
{
name: prim_cross_up_count_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 0", "-define CntStyle CrossCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
// TODO: turn on coverage once design finalizes on issue #8343.
cov: false
}
{
name: prim_cross_down_count_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 1", "-define CntStyle CrossCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
// TODO: turn on coverage once design finalizes on issue #8343.
cov: false
}
{
name: prim_dup_up_count_stopat_cnt0_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 0", "-define CntStyle DupCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
cov: false
stopats: ["*.up_cnt_q[0]"]
}
{
name: prim_dup_up_count_stopat_cnt1_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 0", "-define CntStyle DupCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
cov: false
stopats: ["*.up_cnt_q[1]"]
}
{
name: prim_cross_up_count_stopat_upcnt_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 0", "-define CntStyle CrossCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
cov: false
stopats: ["*.up_cnt_q[0]"]
}
{
name: prim_cross_up_count_stopat_downcnt_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 0", "-define CntStyle CrossCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
cov: false
stopats: ["*.down_cnt"]
}
{
name: prim_cross_down_count_stopat_upcnt_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 1", "-define CntStyle CrossCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
stopats: ["*.up_cnt_q[0]"]
cov: false
}
{
name: prim_cross_down_count_stopat_downcnt_fpv
dut: prim_count_tb
fusesoc_core: lowrisc:fpv:prim_count_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
build_opts: ["-define OutSelDnCnt 1", "-define CntStyle CrossCnt"]
rel_path: "hw/ip/prim/prim_count/{name}/{sub_flow}/{tool}"
stopats: ["*.down_cnt"]
cov: false
}
{
name: prim_lfsr_fpv
dut: prim_lfsr_tb
fusesoc_core: lowrisc:fpv:prim_lfsr_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_lfsr/{sub_flow}/{tool}"
cov: true
}
{
name: prim_fifo_sync_fpv
dut: prim_fifo_sync_tb
fusesoc_core: lowrisc:fpv:prim_fifo_sync_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_fifo_sync/{sub_flow}/{tool}"
cov: true
}
{
name: prim_fifo_async_sram_adapter_fpv
dut: prim_fifo_async_sram_adapter_tb
fusesoc_core: lowrisc:fpv:prim_fifo_async_sram_adapter_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_fifo_async_sram_adapter/{sub_flow}/{tool}"
cov: true
}
{
name: prim_alert_rxtx_fpv
dut: prim_alert_rxtx_tb
fusesoc_core: lowrisc:fpv:prim_alert_rxtx_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_alert_rxtx/{sub_flow}/{tool}"
cov: true
}
{
name: prim_alert_rxtx_fatal_fpv
dut: prim_alert_rxtx_fatal_tb
fusesoc_core: lowrisc:fpv:prim_alert_rxtx_fatal_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_alert_rxtx_fatal/{sub_flow}/{tool}"
cov: true
}
{
name: prim_alert_rxtx_async_fpv
dut: prim_alert_rxtx_async_tb
fusesoc_core: lowrisc:fpv:prim_alert_rxtx_async_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_alert_rxtx_async/{sub_flow}/{tool}"
cov: true
}
{
name: prim_alert_rxtx_async_fatal_fpv
dut: prim_alert_rxtx_async_fatal_tb
fusesoc_core: lowrisc:fpv:prim_alert_rxtx_async_fatal_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_alert_rxtx_fatal/{sub_flow}/{tool}"
cov: true
}
{
name: prim_esc_rxtx_fpv
dut: prim_esc_rxtx_tb
fusesoc_core: lowrisc:fpv:prim_esc_rxtx_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_esc_rxtx/{sub_flow}/{tool}"
cov: true
}
{
name: prim_packer_fpv
dut: prim_packer_tb
fusesoc_core: lowrisc:fpv:prim_packer_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_packer/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_22_16_fpv
dut: prim_secded_22_16_tb
fusesoc_core: lowrisc:fpv:prim_secded_22_16_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_22_16/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_28_22_fpv
dut: prim_secded_28_22_tb
fusesoc_core: lowrisc:fpv:prim_secded_28_22_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_28_22/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_39_32_fpv
dut: prim_secded_39_32_tb
fusesoc_core: lowrisc:fpv:prim_secded_39_32_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_39_32/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_64_57_fpv
dut: prim_secded_64_57_tb
fusesoc_core: lowrisc:fpv:prim_secded_64_57_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_64_57/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_72_64_fpv
dut: prim_secded_72_64_tb
fusesoc_core: lowrisc:fpv:prim_secded_72_64_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_72_64/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_hamming_22_16_fpv
dut: prim_secded_hamming_22_16_tb
fusesoc_core: lowrisc:fpv:prim_secded_hamming_22_16_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_hamming_22_16/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_hamming_39_32_fpv
dut: prim_secded_hamming_39_32_tb
fusesoc_core: lowrisc:fpv:prim_secded_hamming_39_32_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_hamming_39_32/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_hamming_72_64_fpv
dut: prim_secded_hamming_72_64_tb
fusesoc_core: lowrisc:fpv:prim_secded_hamming_72_64_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_hamming_72_64/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_inv_22_16_fpv
dut: prim_secded_inv_22_16_tb
fusesoc_core: lowrisc:fpv:prim_secded_inv_22_16_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_inv_22_16/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_inv_28_22_fpv
dut: prim_secded_inv_28_22_tb
fusesoc_core: lowrisc:fpv:prim_secded_inv_28_22_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_inv_28_22/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_inv_39_32_fpv
dut: prim_secded_inv_39_32_tb
fusesoc_core: lowrisc:fpv:prim_secded_inv_39_32_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_inv_39_32/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_inv_64_57_fpv
dut: prim_secded_inv_64_57_tb
fusesoc_core: lowrisc:fpv:prim_secded_inv_64_57_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_inv_64_57/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_inv_72_64_fpv
dut: prim_secded_inv_72_64_tb
fusesoc_core: lowrisc:fpv:prim_secded_inv_72_64_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_secded_inv_72_64/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_inv_hamming_22_16_fpv
dut: prim_secded_inv_hamming_22_16_tb
fusesoc_core: lowrisc:fpv:prim_secded_inv_hamming_22_16_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_hamming_22_16/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_inv_hamming_39_32_fpv
dut: prim_secded_inv_hamming_39_32_tb
fusesoc_core: lowrisc:fpv:prim_secded_inv_hamming_39_32_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_hamming_39_32/{sub_flow}/{tool}"
cov: true
}
{
name: prim_secded_inv_hamming_72_64_fpv
dut: prim_secded_inv_hamming_72_64_tb
fusesoc_core: lowrisc:fpv:prim_secded_inv_hamming_72_64_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_hamming_72_64/{sub_flow}/{tool}"
cov: true
}
{
name: pinmux_fpv
dut: pinmux_tb
fusesoc_core: lowrisc:fpv:pinmux_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/pinmux/{sub_flow}/{tool}"
cov: true
defines: "FPV_ALERT_NO_SIGINT_ERR"
}
{
// Use chip_eargrey_asic parameters.
name: pinmux_chip_fpv
dut: pinmux_tb
fusesoc_core: lowrisc:systems:pinmux_chip_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/top_matcha/ip/pinmux/{sub_flow}/{tool}"
cov: true
defines: "FPV_ALERT_NO_SIGINT_ERR"
overrides: [
{
name: design_level
value: "top"
}
]
}
{
name: rv_plic_fpv
dut: rv_plic_tb
fusesoc_core: lowrisc:opentitan:top_matcha_rv_plic_fpv
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/top_matcha/ip_autogen/rv_plic/{sub_flow}/{tool}"
cov: true
overrides: [
{
name: design_level
value: "top"
}
]
}
{ name: prim_max_tree
dut: prim_max_tree
fusesoc_core: lowrisc:prim:max_tree
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_max_tree/{sub_flow}/{tool}"
cov: true
}
{ name: prim_sum_tree
dut: prim_sum_tree
fusesoc_core: lowrisc:prim:sum_tree
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_sum_tree/{sub_flow}/{tool}"
cov: true
}
{ name: prim_onehot_check
dut: prim_onehot_check
fusesoc_core: lowrisc:prim:onehot_check
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/prim/prim_onehot_check/{sub_flow}/{tool}"
cov: true
}
// Below are IPs that already has a DV testbench,
// FPV only verifies the security countermeasure assertions,
// so will not collect FPV coverage.
{
name: aes_masking_sec_cm
dut: aes
fusesoc_core: lowrisc:dv:aes_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/aes/masking/{sub_flow}/{tool}"
defines: "EN_MASKING=1"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: aes_no_masking_sec_cm
dut: aes
fusesoc_core: lowrisc:dv:aes_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/aes/no_masking/{sub_flow}/{tool}"
defines: "EN_MASKING=0"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: alert_handler_sec_cm
dut: alert_handler
fusesoc_core: lowrisc:opentitan:top_matcha_alert_handler_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/top_matcha/ip_autogen/alert_handler/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: clkmgr_sec_cm
dut: clkmgr
fusesoc_core: lowrisc:dv:clkmgr_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/clkmgr/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
}
{
name: csrng_sec_cm
dut: csrng
fusesoc_core: lowrisc:dv:csrng_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/csrng/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: edn_sec_cm
dut: edn
fusesoc_core: lowrisc:dv:edn_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/edn/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: entropy_src_sec_cm
dut: entropy_src
fusesoc_core: lowrisc:dv:entropy_src_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/entropy_src/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: flash_ctrl_sec_cm
dut: flash_ctrl
fusesoc_core: lowrisc:dv:flash_ctrl_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/flash_ctrl/{sub_flow}/{tool}"
cov: false
overrides: [
{
name: design_level
value: "top"
}
]
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: keymgr_sec_cm
dut: keymgr
fusesoc_core: lowrisc:dv:keymgr_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/keymgr/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["{*u_state_regs.state_o}",
"{*u_ctrl.u_data_state_regs.state_o}"]
}
{
name: kmac_sec_cm
dut: kmac
fusesoc_core: lowrisc:dv:kmac_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/kmac/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: lc_ctrl_sec_cm
dut: lc_ctrl
fusesoc_core: lowrisc:dv:lc_ctrl_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/lc_ctrl/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_lc_ctrl_fsm.u_fsm_state_regs.state_o",
"*u_lc_ctrl_fsm.u_state_regs.state_o",
"*u_lc_ctrl_fsm.u_cnt_regs.state_o",
"*u_lc_ctrl_kmac_if.u_state_regs.state_o"]
}
{
name: otp_ctrl_sec_cm
dut: otp_ctrl
fusesoc_core: lowrisc:dv:otp_ctrl_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/otp_ctrl/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: otbn_sec_cm
dut: otbn
fusesoc_core: lowrisc:dv:otbn_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/otbn/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: pwrmgr_sec_cm
dut: pwrmgr
fusesoc_core: google:dv:pwrmgr_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/pwrmgr/{sub_flow}/{tool}"
cov: false
overrides: [
{
name: design_level
value: "top"
}
]
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: rom_ctrl_sec_cm
dut: rom_ctrl
fusesoc_core: lowrisc:dv:rom_ctrl_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/rom_ctrl/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: rstmgr_sec_cm
dut: rstmgr
fusesoc_core: lowrisc:dv:rstmgr_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/rstmgr/{sub_flow}/{tool}"
cov: false
overrides: [
{
name: design_level
value: "top"
}
]
task: "FpvSecCm"
stopats: ["*u_state_regs.state_o"]
}
{
name: rv_core_ibex_smc_cm
dut: rv_core_smc
fusesoc_core: lowrisc:dv:rv_core_smc_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/otbn/{sub_flow}/{tool}"
stopats: ["*if_stage_i.pc_mismatch_alert_o",
"*icache_i.ecc_error_o",
"*gen_regfile_ecc.rf_ecc_err_a",
"*gen_regfile_ecc.rf_ecc_err_b"]
cov: false
task: "FpvSecCm"
}
{
name: sram_ctrl_sec_cm
dut: sram_ctrl
fusesoc_core: lowrisc:dv:sram_ctrl_sva
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/sram_ctrl/{sub_flow}/{tool}"
cov: false
task: "FpvSecCm"
}
# Other non-standard countermeasure checks
{
name: lc_ctrl_sec_cm_fsm
dut: lc_ctrl_fsm
fusesoc_core: lowrisc:ip:lc_ctrl
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/lc_ctrl/fsm/{sub_flow}/{tool}"
cov: false
}
{
name: keymgr_sec_cm_fsm
dut: keymgr_ctrl
fusesoc_core: lowrisc:ip:keymgr
import_cfgs: ["{proj_root}/hw/formal/tools/dvsim/common_fpv_cfg.hjson"]
rel_path: "hw/ip/keymgr/fsm/{sub_flow}/{tool}"
cov: false
}
]
}