/*
 * Copyright 2023 Google LLC
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */


// Simple program to turn on the SMC and fall asleep.

#include "hw/top_matcha/sw/autogen/top_matcha.h"
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/dif/dif_pinmux.h"
#include "sw/device/lib/dif/dif_smc_ctrl.h"
#include "sw/device/lib/dif/dif_uart.h"
#include "sw/device/lib/runtime/hart.h"
#include "sw/device/lib/testing/pinmux_testutils.h"
#include "sw/device/lib/testing/test_framework/check.h"
#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
#include "sw/device/lib/testing/test_framework/test_util.h"

#if defined(PAGE_BOUNDARY_TEST)
#include "sw/device/tests/smc/smc_page_boundary_test_fpga_nexus_bin_c.h"
#elif defined(INTERRUPT_BOUNDARY_TEST)
#include "sw/device/tests/smc/smc_interrupt_boundary_test_fpga_nexus_bin_c.h"
#elif defined(LSU_INTERRUPT_BOUNDARY_TEST)
#include "sw/device/tests/smc/smc_lsu_interrupt_boundary_test_fpga_nexus_bin_c.h"
#elif defined(LSU_PAGE_BOUNDARY_TEST)
#include "sw/device/tests/smc/smc_lsu_page_boundary_test_fpga_nexus_bin_c.h"
#elif defined(CAM_I2C_TEST)
#include "sw/device/tests/smc/smc_cam_i2c_test_fpga_nexus_bin_c.h"
#elif defined(I2S_RX_TEST)
#include "sw/device/tests/smc/smc_i2s_rx_test_fpga_nexus_bin_c.h"
#elif defined(I2S_TX_TEST)
#include "sw/device/tests/smc/smc_i2s_tx_test_fpga_nexus_bin_c.h"
#elif defined(SUPERVISOR_MODE_TEST)
#include "sw/device/tests/smc/smc_supervisor_mode_test_fpga_nexus_bin_c.h"
#elif defined(VIRTUAL_MEMORY_TEST)
#include "sw/device/tests/smc/smc_virtual_memory_test_fpga_nexus_bin_c.h"
#elif defined(ATOMICS_TEST)
#include "sw/device/tests/smc/smc_atomics_test_fpga_nexus_bin_c.h"
#elif defined(ISP_IRQ_TEST)
#include "sw/device/tests/smc/smc_isp_wrapper_irq_test_fpga_nexus_bin_c.h"
#elif defined(ISP_TPG_128_64_TEST)
#include "sw/device/tests/smc/smc_isp_wrapper_tpg_128_64_test_fpga_nexus_bin_c.h"
#elif defined(ML_TOP_IRQ_TEST)
#include "sw/device/tests/smc/smc_ml_top_irq_test_fpga_nexus_bin_c.h"
#endif

OTTF_DEFINE_TEST_CONFIG();

static dif_pinmux_t pinmux;
static dif_smc_ctrl_t smc_ctrl;
static dif_uart_t uart;

void _ottf_main(void) {
  // Initialize the UART to enable logging for non-DV simulation platforms.
  if (kDeviceType != kDeviceSimDV) {
    init_uart(TOP_MATCHA_UART0_BASE_ADDR, &uart);
  }

  CHECK_DIF_OK(dif_pinmux_init(
      mmio_region_from_addr(TOP_MATCHA_PINMUX_AON_BASE_ADDR), &pinmux));
#if defined(I2S_TX_TEST)
  CHECK_DIF_OK(pinmux_testutils_configure_i2s_tx(&pinmux));
#endif

#if defined(I2S_RX_TEST)
  CHECK_DIF_OK(pinmux_testutils_configure_i2s_rx(&pinmux));
#endif

#if defined(CAM_I2C_TEST)
  CHECK_DIF_OK(pinmux_testutils_configure_cam_i2c(&pinmux));
  CHECK_DIF_OK(pinmux_testutils_configure_cam_ctrl(&pinmux));
#endif

#if defined(CAM_I2C_TEST) || defined(ISP_IRQ_TEST) || \
    defined(ISP_TPG_128_64_TEST)
  CHECK_DIF_OK(pinmux_testutils_configure_isp_wrapper(&pinmux));
#endif

#if defined(HAS_SMC_BIN)
  if (kDeviceType == kDeviceFpgaNexus) {
    memcpy((void*)TOP_MATCHA_RAM_SMC_BASE_ADDR, smc_bin, smc_bin_len);
  }
#endif
  CHECK_DIF_OK(dif_smc_ctrl_init(
      mmio_region_from_addr(TOP_MATCHA_SMC_CTRL_BASE_ADDR), &smc_ctrl));

  CHECK_DIF_OK(dif_smc_ctrl_set_en(&smc_ctrl));

  // Note: the SMC must end the simulation through testing or otherwise, as the
  // secure core indefinitely sleeps.
  while (true) {
    asm volatile("wfi");
  }
}