diff --git a/hw/top_matcha/dv/chip_sim_cfg.hjson b/hw/top_matcha/dv/chip_sim_cfg.hjson
index 60f47e5..fcf5414 100644
--- a/hw/top_matcha/dv/chip_sim_cfg.hjson
+++ b/hw/top_matcha/dv/chip_sim_cfg.hjson
@@ -1798,7 +1798,7 @@
     {
       name: chip_sw_lc_ctrl_program_error
       uvm_test_seq: chip_sw_lc_ctrl_program_error_vseq
-      sw_images: ["sw/device/tests/sim_dv:lc_ctrl_program_error:1"]
+      sw_images: ["sw/device/tests/sim_dv:lc_ctrl_program_error:1:matcha"]
       en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+en_scb=0", "+bypass_alert_ready_to_end_check=1"]
     }
@@ -2099,6 +2099,7 @@
       // TODO(b/287644985): Track the dv tests to be implemented.
       name: edacloud_nightly
       tests: [
+        "chip_jtag_mem_access",
         "chip_padctrl_attributes",
         "chip_plic_all_irqs",
         "chip_rv_dm_lc_disabled",
@@ -2142,6 +2143,7 @@
         "chip_sw_kmac_idle",
         "chip_sw_kmac_smoketest",
         "chip_sw_lc_ctrl_otp_hw_cfg",
+        "chip_sw_lc_ctrl_program_error",
         "chip_sw_otbn_smoketest",
         "chip_sw_otp_ctrl_escalation",
         "chip_sw_otp_ctrl_smoketest",
@@ -2207,6 +2209,7 @@
     {
       name: edacloud_all
       tests: [
+        "chip_jtag_mem_access",
         "chip_padctrl_attributes",
         "chip_plic_all_irqs",
         "chip_rv_dm_lc_disabled",
@@ -2250,6 +2253,7 @@
         "chip_sw_kmac_idle",
         "chip_sw_kmac_smoketest",
         "chip_sw_lc_ctrl_otp_hw_cfg",
+        "chip_sw_lc_ctrl_program_error",
         "chip_sw_otbn_smoketest",
         "chip_sw_otp_ctrl_escalation",
         "chip_sw_otp_ctrl_smoketest",
diff --git a/sw/device/tests/sim_dv/BUILD b/sw/device/tests/sim_dv/BUILD
index 4686139..43cfc58 100644
--- a/sw/device/tests/sim_dv/BUILD
+++ b/sw/device/tests/sim_dv/BUILD
@@ -507,3 +507,18 @@
         "@lowrisc_opentitan//sw/device/lib/testing:sram_ctrl_testutils",
     ],
 )
+
+matcha_dv_test(
+    name = "lc_ctrl_program_error",
+    srcs = ["@lowrisc_opentitan//sw/device/tests/sim_dv:lc_ctrl_program_error.c"],
+    deps = [
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/dif:alert_handler",
+        "//sw/device/lib/dif:rstmgr",
+        "//sw/device/lib/testing:alert_handler_testutils",
+        "//sw/device/tests:test_dv_lib_opentitan",
+        "@lowrisc_opentitan//sw/device/lib/dif:lc_ctrl",
+        "@lowrisc_opentitan//sw/device/lib/testing:lc_ctrl_testutils",
+        "@lowrisc_opentitan//sw/device/lib/testing:rstmgr_testutils",
+    ],
+)