)]}'
{
  "commit": "49ffbc6f976ebb2ecb38e16540c2e3990f6f422d",
  "tree": "a60a46424f95d37cb9e0a5711a91c3a4adbb5c97",
  "parents": [
    "914ad1502de8d7493510a7d7ed0c71a25a4688d0"
  ],
  "author": {
    "name": "zl.tang",
    "email": "zhilong.tang@verisilicon.com",
    "time": "Tue Jun 20 17:06:25 2023 +0800"
  },
  "committer": {
    "name": "Yenkai Wang",
    "email": "ykwang@google.com",
    "time": "Fri Jul 07 12:52:31 2023 -0600"
  },
  "message": "Resolve false timeout bug in dv testbench and revise dv tests\n\nKelvin tests are not revised yet and removed from nightly regression.\n\nBug:287644985\n\nChange-Id: I3e1955ef1933e632b6bb7e79d38a07dd53d726de\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "620b47e23c668b59feb5370995a8da3c2b26c091",
      "old_mode": 33188,
      "old_path": "hw/top_matcha/dv/chip_sim_cfg.hjson",
      "new_id": "164c73a774596e2fabe78555fd745ed3eb2d4bfa",
      "new_mode": 33188,
      "new_path": "hw/top_matcha/dv/chip_sim_cfg.hjson"
    },
    {
      "type": "modify",
      "old_id": "264736d97a0929c9a2f88e4dd16cb2aed2f888be",
      "old_mode": 33188,
      "old_path": "hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv",
      "new_id": "ad8fdc21b231da18936781bff9349e0f3835bb4f",
      "new_mode": 33188,
      "new_path": "hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv"
    }
  ]
}