commit | 3fda1417ebf23094261c44bc011a996ac55814af | [log] [tgz] |
---|---|---|
author | Stefan Hall <stefanhall@google.com> | Thu Dec 07 16:22:39 2023 -0800 |
committer | Stefan Hall <stefanhall@google.com> | Mon Dec 11 15:19:48 2023 -0800 |
tree | 32165aad46204a3ca5edee58796a810bdb535426 | |
parent | 8790983c92170e1d30c3652f300ed61b988a91f1 [diff] |
500kHz JTAG - 5MHz SPI Slave Alleviate some timing issues for routing tool by modifying the below constraints: - JTAG speed to maximum 500KHz - SPI slave speed to maximum 5MHz Change-Id: Ic6c621998a9593e2556670e7f47d955c8e3cc2b6
Matcha is an open-source reference hardware implementation for Project Open Se Cura, a low-power, secure embedded platform for ambient ML applications.
This repository contains hardware (RTL), software, and utilities written as part of the Matcha project.
The project contains comprehensive documentation of the SOC, all IPs, and tools.
Have a look at our GettingStarted Guide for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).
Development for matcha requires that the necessary tools and prerequisites be installed. See GettingStarted Guide
To setup the build system, run following steps at root of repo:
source build/setup.sh
Install the prerequisites:
m prereqs
Install the tools used for development:
m tools
<root_dir>/hw/matcha/ hw/top_matcha/ BUILD cdc/ data/ dv/ formal/ ip/ ip_autogen/ lint/ rdc/ rtl/ sw/ syn/ util/ hw/ BUILD Makefile sw/ BUILD device/ util/ BUILD dvsim_matcha/ make_new_dif/ openocd/ topgen_util/ topgen_matcha.py <root_dir>/hw/opentitan_upstream/ <root_dir>/build/ <root_dir>/Manifest/ <root_dir>/Makefile <root_dir>/GettingStarted.md <toot_dir>/...
For following steps, make sure the above “Prerequisites” steps have been run if the repo is been checked out at the first time.
Build RTL top Level and generate registers, interrupt and address map:
m matcha_hw_generate_all
Build verilator simulation target:
m matcha_hw_verilator_sim
Run matcha verilator test suite
m matcha_hw_verilator_tests
Run FPGA compilation flow for Nexus FPGA board:
m matcha_hw_fpga_nexus
Run matcha single test with messages to stdout
bazel test --test_output=streamed //sw/device/tests:verilator_mailbox_test
Run matcha test suites
bazel test --test_output=streamed //sw/device/tests:verilator_test_suite
Run FPGA compilation flow for Nexus FPGA board with debug commands:
bazel build -s //hw/bitstream/vivado:fpga_nexus
Enable tracing on a single test
bazel test --test_output=streamed --test_timeout=1000000 --test_arg=--trace //sw/device/tests:verilator_cam_ctrl_test
Note: --test_timeout=1000000
sets timeout in seconds. This helps prevent timeout issues then using trace.
Waveform dump and peripheral logs for a test located in:
<root_dir>/hw/matcha/bazel-testlogs/sw/device/tests/<test_name>/test.outputs/output.zip sim.fst (if tracing is enabled) uart0.log smc_uart.log spi0.log usb0.log
Note: The trace_core_#.log files available in output.zip is currently a TODO item.
<matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/impl_1/chip_matcha_nexus.bit <matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/impl_1/.rpt <matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/synth_1/.rpt