# Copyright 2023 Google LLC
# Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0

load("@bazel_skylib//rules:common_settings.bzl", "string_list_flag")
load("@lowrisc_opentitan//rules:fusesoc.bzl", "fusesoc_build")

package(default_visibility = ["//visibility:public"])

# This configuration exposes fusesoc's "make_options" to enable parallel
# compilation of the verilated model.
string_list_flag(
    name = "make_options",
    build_setting_default = [
        "-j",
        "$(nproc)",
    ],
)

fusesoc_build(
    name = "verilator_real",
    srcs = [
        ":all_files",
        "//hw/top_matcha/dv/verilator:all_files",
    ],
    cores = [
        "//:cores",
    ],
    data = ["@lowrisc_opentitan//hw/ip/otbn:all_files"],
    make_options = ":make_options",
    output_groups = {
        "binary": ["sim-verilator/Vchip_sim_tb"],
    },
    systems = ["lowrisc:dv:chip_verilator_sim"],
    tags = [
        "manual",
        "verilator",
    ],
    target = "sim",
)

filegroup(
    name = "verilator_bin",
    srcs = [":verilator_real"],
    output_group = "binary",
)

# This is used in CI steps that do not want to run Verilator tests, and thus
# do not want to accidentally build the Verilator model. This causes the
# //hw:verilator target to not emit any files, which will break any tests that
# actually rely on this; builds will succeed, tests will fail.
config_setting(
    name = "disable_verilator_build",
    values = {"define": "DISABLE_VERILATOR_BUILD=true"},
)

genrule(
    name = "verilator_stub",
    outs = ["Vfake_sim_tb"],
    cmd = """
        script=$@
        echo '#!/bin/bash' > $$script
        echo 'echo "ERROR: sim_verilator tests cannot be run when --define DISABLE_VERILATOR_BUILD=true is set!"' >> $$script
        echo 'echo "This indicates an error in your Bazel invokation"' >> $$script
        echo 'exit 1' >> $$script
        chmod +x $@
    """,
)

alias(
    name = "verilator",
    actual = select({
        ":disable_verilator_build": ":verilator_stub",
        "//conditions:default": ":verilator_bin",
    }),
    tags = ["verilator"],
    visibility = ["//visibility:public"],
)

filegroup(
    name = "all_files",
    srcs = glob(["**"]) + [
        "//hw/top_matcha:all_files",
        "@lowrisc_opentitan//hw/dv:all_files",
    ] + select({
        "//rules:airgapped_env": [
            "@fastvdma_core//:all_files",
            "@kelvin_core//:all_files",
        ],
        "//conditions:default": [
            "//hw/top_matcha/ip/dma/chisel:fastvdma_core",
            "@kelvin_hw//hdl/chisel:kelvin_core",
        ],
    }),
)