blob: c9c46f797e11c5e59e7812bdd5f5ca4253ea633a [file] [log] [blame]
# Copyright 2023 Google LLC
# Copyright lowRISC contributors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
import os
import logging as log
from typing import List, Optional, Tuple
from mako import exceptions # type: ignore
from mako.lookup import TemplateLookup # type: ignore
from pkg_resources import resource_filename
from reggen.gen_dv import gen_core_file
from topgen.top import Top
def sv_base_addr(top: Top, if_name: Tuple[str, Optional[str]]) -> str:
'''Get the base address of a device interface in SV syntax'''
return "{}'h{:x}".format(top.regwidth, top.if_addrs[if_name])
def gen_dv(top: Top,
dv_base_names: List[str],
outdir: str,
matcha_root: str) -> int:
'''Generate DV RAL model for a Top'''
# Read template
lookup = TemplateLookup(directories=[os.path.join(matcha_root, "util/topgen_matcha"),
resource_filename('reggen', '.')])
uvm_reg_tpl = lookup.get_template('top_uvm_reg.sv.tpl')
# isp_wrapper is excluded from CSR tests
create_isp_wrapper = "1'b1"
if "cover_reg_top" in outdir:
create_isp_wrapper = "1'b0"
# TODO(b/297065395):
# DMA should check byte write to its CSRs
#
# Also, rv_dm can't access dma0 at this time
create_dma = "1'b1"
if "no_dma" in outdir:
create_dma = "1'b0"
# Expand template
try:
to_write = uvm_reg_tpl.render(top=top,
dv_base_names=dv_base_names,
create_isp_wrapper=create_isp_wrapper,
create_dma=create_dma)
except: # noqa: E722
log.error(exceptions.text_error_template().render())
return 1
# Dump to output file
dest_path = '{}/chip_ral_pkg.sv'.format(outdir)
with open(dest_path, 'w') as fout:
fout.write(to_write)
gen_core_file(outdir, 'chip', dv_base_names, ['chip_ral_pkg.sv'])
return 0