)]}'
{
  "id": "1dfb7787146c1951ac5ff7b09ace16777bebb9c5",
  "repo": "hw/kelvin",
  "revision": "d79c4a7b1535787d4b002fc8b8a2412b7744da39",
  "path": "hdl/verilog/ClockGate.sv"
}
