tree c2bf1def9b8d2465aa315b51d709940f13a4051b
parent 0a5012dac31defec46ced59c1a3110f93e40ec21
author Alex Van Damme <atv@google.com> 1709250361 -0800
committer Alex Van Damme <atv@google.com> 1709589559 -0800

Refactor testbenches to scale w/ instructionLanes

- Using the exported parameters from the HDL, refactor the test benches
  to use the specified count of instruction lanes. This should allow us
  to compile the testbenches against verilated models with different
  parameters, without additional source changes.
- Define a few handy utility macros to help with this.

Change-Id: I75dbf43d6f8edfcdf84688a9e05de400f8a8e0fa