tree dd2ce71d36b559baf7acbbd8c5224deb9c566a9b
parent 4782b765cbd4a159b3791b2fca67243e1d47f9c3
author Alex Van Damme <atv@google.com> 1754344553 -0700
committer Alex Van Damme <atv@google.com> 1754524475 -0700

refactor(hdl): Make CoreAxiCSR bus-width agnostic

This change refactors the CoreAxiCSR module to be bus-width agnostic.
This is a precursor to adding TileLink support, which has a different
bus width than AXI.

Change-Id: I83424b4b587a5bd6833d9a5e9db862a613af2210