//==================================================
// This file contains the Excluded objects
// Generated By User: atv
// Format Version: 2
// Date: Thu Mar 13 23:07:35 2025
// ExclMode: default
//==================================================
CHECKSUM: "4119519692 3680705223"
INSTANCE: CoreMiniAxi.itcmWrapper
Condition 1 "3205840009" "(io_fabric_readDataAddr_valid & ((~io_fabric_writeDataAddr_valid))) 1 -1" (2 "10")
CHECKSUM: "2410233940 807467439"
INSTANCE: CoreMiniAxi.core.score.mlu
Condition 4 "847840945" "(((|{(_stage3Input_q_io_deq_bits_op == 3'h3), (_stage3Input_q_io_deq_bits_op == 3'h2), (_stage3Input_q_io_deq_bits_op == 3'b1)})) ? _stage3Input_q_io_deq_bits_prod[63:32] : 32'b0) 1 -1" (1 "0")
CHECKSUM: "3100061340 4081563907"
INSTANCE: CoreMiniAxi.core.score.lsu.ctrl.mslice
Condition 2 "263964203" "(((~empty)) & io_out_ready) 1 -1" (1 "01")
CHECKSUM: "3085788803 98748527"
INSTANCE: CoreMiniAxi.core.score.lsu.data
Condition 10 "546485261" "((ipos[0] == opos[0]) & (ipos[1] != opos[1])) 1 -1" (3 "11")
Condition 6 "1749996916" "((_GEN & ((~empty))) | (_GEN_0 & full)) 1 -1" (2 "01")
Condition 6 "1749996916" "((_GEN & ((~empty))) | (_GEN_0 & full)) 1 -1" (3 "10")
Condition 8 "1642521241" "(_GEN_0 & full) 1 -1" (1 "01")
Condition 8 "1642521241" "(_GEN_0 & full) 1 -1" (3 "11")
Condition 7 "2272740202" "(_GEN & ((~empty))) 1 -1" (3 "11")
Condition 2 "3296137515" "(((~empty)) & full) 1 -1" (3 "11")
Condition 2 "3296137515" "(((~empty)) & full) 1 -1" (1 "01")
Condition 4 "3793272986" "(_GEN & empty) 1 -1" (2 "10")
Condition 5 "3691995454" "(_GEN_0 & ((~full))) 1 -1" (2 "10")
CHECKSUM: "2612366597 2684695037"
INSTANCE: CoreMiniAxi.dtcmWrapper
Condition 1 "3205840009" "(io_fabric_readDataAddr_valid & ((~io_fabric_writeDataAddr_valid))) 1 -1" (2 "10")
CHECKSUM: "861662565 898489784"
INSTANCE: CoreMiniAxi.itcmArbiter
Condition 1 "2379988423" "(io_source_0_readDataAddr_valid | io_source_0_writeDataAddr_valid) 1 -1" (2 "01")
CHECKSUM: "3236325170 1494654826"
INSTANCE: CoreMiniAxi.core.score.mlu.stage2Input_q
Toggle ram [7] "reg ram[11:0]"
Toggle io_deq_bits_op [2] "net io_deq_bits_op[2:0]"
Toggle io_enq_bits_op [2] "net io_enq_bits_op[2:0]"
CHECKSUM: "763173141 3870047335"
INSTANCE: CoreMiniAxi.core.score.mlu.stage3Input_q
Toggle ram [7] "reg ram[73:0]"
Toggle io_deq_bits_op [2] "net io_deq_bits_op[2:0]"
Toggle io_enq_bits_op [2] "net io_enq_bits_op[2:0]"
CHECKSUM: "3104090697 871974457"
INSTANCE: CoreMiniAxi.core.score.alu_0
Toggle _GEN_1 [17] "net _GEN_1[18:0]"
Toggle _GEN_1 [3] "net _GEN_1[18:0]"
Toggle _GEN_1 [5] "net _GEN_1[18:0]"
Toggle _GEN_1 [7] "net _GEN_1[18:0]"
Toggle _GEN_1 [9] "net _GEN_1[18:0]"
Toggle _GEN_1 [11] "net _GEN_1[18:0]"
Toggle _GEN_1 [13] "net _GEN_1[18:0]"
Toggle _GEN_1 [15] "net _GEN_1[18:0]"
Toggle _GEN_1 [1] "net _GEN_1[18:0]"
Toggle _GEN_5 [16][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [15][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [14][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [3][31:1] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [2][31:1] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [23][31:16] "net [31:0][31:0]_GEN_5"
Toggle _GEN [30] "net _GEN[31:0]"
Toggle _GEN [29] "net _GEN[31:0]"
Toggle _GEN [28] "net _GEN[31:0]"
Toggle _GEN [27] "net _GEN[31:0]"
Toggle _GEN [26] "net _GEN[31:0]"
Toggle _GEN [25] "net _GEN[31:0]"
Toggle _GEN [24] "net _GEN[31:0]"
Toggle _GEN [23] "net _GEN[31:0]"
Toggle _GEN [22] "net _GEN[31:0]"
Toggle _GEN [21] "net _GEN[31:0]"
Toggle _GEN [20] "net _GEN[31:0]"
Toggle _GEN [19] "net _GEN[31:0]"
Toggle _GEN [18] "net _GEN[31:0]"
Toggle _GEN [17] "net _GEN[31:0]"
Toggle _GEN [16] "net _GEN[31:0]"
Toggle _GEN [15] "net _GEN[31:0]"
Toggle _GEN [14] "net _GEN[31:0]"
Toggle _GEN [13] "net _GEN[31:0]"
Toggle _GEN [12] "net _GEN[31:0]"
Toggle _GEN [11] "net _GEN[31:0]"
Toggle _GEN [10] "net _GEN[31:0]"
Toggle _GEN [9] "net _GEN[31:0]"
Toggle _GEN [8] "net _GEN[31:0]"
Toggle _GEN [7] "net _GEN[31:0]"
Toggle _GEN [6] "net _GEN[31:0]"
Toggle _GEN [5] "net _GEN[31:0]"
Toggle _GEN [31] "net _GEN[31:0]"
Toggle _GEN_5 [31:24][31:0] "net [31:0][31:0]_GEN_5"
CHECKSUM: "3318354289 3975193560"
INSTANCE: CoreMiniAxi.axiSlave.addrArbiter
Toggle io_in_0_bits_addr [31] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [15] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [18] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [19] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [20] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [21] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [22] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [23] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [24] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [25] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [26] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [27] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [28] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [29] "net io_in_0_bits_addr[31:0]"
Toggle io_in_0_bits_addr [30] "net io_in_0_bits_addr[31:0]"
Toggle io_out_bits_region "net io_out_bits_region[3:0]"
Toggle io_out_bits_qos "net io_out_bits_qos[3:0]"
Toggle io_out_bits_cache "net io_out_bits_cache[3:0]"
Toggle io_out_bits_lock "net io_out_bits_lock[1:0]"
Toggle io_out_bits_prot "net io_out_bits_prot[2:0]"
Toggle io_out_bits_addr [31] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [15] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [18] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [19] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [20] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [21] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [22] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [23] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [24] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [25] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [26] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [27] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [28] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [29] "net io_out_bits_addr[31:0]"
Toggle io_out_bits_addr [30] "net io_out_bits_addr[31:0]"
Toggle io_in_1_bits_region "net io_in_1_bits_region[3:0]"
Toggle io_in_1_bits_qos "net io_in_1_bits_qos[3:0]"
Toggle io_in_1_bits_cache "net io_in_1_bits_cache[3:0]"
Toggle io_in_1_bits_lock "net io_in_1_bits_lock[1:0]"
Toggle io_in_1_bits_prot "net io_in_1_bits_prot[2:0]"
Toggle io_in_1_bits_addr [31] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [15] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [18] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [19] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [20] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [21] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [22] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [23] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [24] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [25] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [26] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [27] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [28] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [29] "net io_in_1_bits_addr[31:0]"
Toggle io_in_1_bits_addr [30] "net io_in_1_bits_addr[31:0]"
Toggle io_in_0_bits_region "net io_in_0_bits_region[3:0]"
Toggle io_in_0_bits_qos "net io_in_0_bits_qos[3:0]"
Toggle io_in_0_bits_cache "net io_in_0_bits_cache[3:0]"
Toggle io_in_0_bits_lock "net io_in_0_bits_lock[1:0]"
Toggle io_in_0_bits_prot "net io_in_0_bits_prot[2:0]"
CHECKSUM: "541178121 1731000772"
INSTANCE: CoreMiniAxi.core.score.mlu.arb
Toggle io_in_1_bits_op [2] "net io_in_1_bits_op[2:0]"
Toggle io_in_2_bits_op [2] "net io_in_2_bits_op[2:0]"
Toggle io_in_3_bits_op [2] "net io_in_3_bits_op[2:0]"
Toggle io_out_bits_op [2] "net io_out_bits_op[2:0]"
Toggle io_in_0_bits_op [2] "net io_in_0_bits_op[2:0]"
CHECKSUM: "2550759643 2975149878"
INSTANCE: CoreMiniAxi.core.score.fetch.instructionBuffer
Toggle io_feedIn_bits_1_addr [0] "net io_feedIn_bits_1_addr[31:0]"
Toggle io_feedIn_bits_1_addr [1] "net io_feedIn_bits_1_addr[31:0]"
Toggle io_feedIn_bits_2_addr [0] "net io_feedIn_bits_2_addr[31:0]"
Toggle io_feedIn_bits_2_addr [1] "net io_feedIn_bits_2_addr[31:0]"
Toggle io_feedIn_bits_3_addr [0] "net io_feedIn_bits_3_addr[31:0]"
Toggle io_feedIn_bits_3_addr [1] "net io_feedIn_bits_3_addr[31:0]"
Toggle io_out_0_bits_addr [0] "net io_out_0_bits_addr[31:0]"
Toggle io_out_0_bits_addr [1] "net io_out_0_bits_addr[31:0]"
Toggle io_out_1_bits_addr [0] "net io_out_1_bits_addr[31:0]"
Toggle io_out_1_bits_addr [1] "net io_out_1_bits_addr[31:0]"
Toggle io_out_2_bits_addr [0] "net io_out_2_bits_addr[31:0]"
Toggle io_out_2_bits_addr [1] "net io_out_2_bits_addr[31:0]"
Toggle io_out_3_bits_addr [0] "net io_out_3_bits_addr[31:0]"
Toggle io_out_3_bits_addr [1] "net io_out_3_bits_addr[31:0]"
Toggle _slice_io_feedOut_bits_3_addr [0] "net _slice_io_feedOut_bits_3_addr[31:0]"
Toggle _slice_io_feedOut_bits_3_addr [1] "net _slice_io_feedOut_bits_3_addr[31:0]"
Toggle _slice_io_feedOut_bits_2_addr [0] "net _slice_io_feedOut_bits_2_addr[31:0]"
Toggle _slice_io_feedOut_bits_2_addr [1] "net _slice_io_feedOut_bits_2_addr[31:0]"
Toggle _slice_io_feedOut_bits_1_addr [0] "net _slice_io_feedOut_bits_1_addr[31:0]"
Toggle _slice_io_feedOut_bits_1_addr [1] "net _slice_io_feedOut_bits_1_addr[31:0]"
Toggle _slice_io_feedOut_bits_0_addr [0] "net _slice_io_feedOut_bits_0_addr[31:0]"
Toggle _slice_io_feedOut_bits_0_addr [1] "net _slice_io_feedOut_bits_0_addr[31:0]"
Toggle io_feedIn_bits_0_addr [0] "net io_feedIn_bits_0_addr[31:0]"
Toggle io_feedIn_bits_0_addr [1] "net io_feedIn_bits_0_addr[31:0]"
CHECKSUM: "3771550308 3964863177"
INSTANCE: CoreMiniAxi.fabricMux
Toggle io_source_readDataAddr_bits [31] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [18] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [19] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [20] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [21] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [22] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [23] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [24] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [25] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [26] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [27] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [28] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [29] "net io_source_readDataAddr_bits[31:0]"
Toggle io_source_readDataAddr_bits [30] "net io_source_readDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [31] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [13] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [14] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [15] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [16] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [17] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [18] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [19] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [20] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [21] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [22] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [23] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [24] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [25] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [26] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [27] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [28] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [29] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [30] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [31] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [13] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [14] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [15] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [16] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [17] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [18] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [19] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [20] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [21] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [22] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [23] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [24] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [25] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [26] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [27] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [28] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [29] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [30] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [31] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [15] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [16] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [17] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [18] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [19] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [20] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [21] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [22] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [23] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [24] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [25] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [26] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [27] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [28] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [29] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_writeDataAddr_bits [30] "net io_ports_1_writeDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [31] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [15] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [16] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [17] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [18] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [19] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [20] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [21] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [22] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [23] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [24] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [25] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [26] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [27] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [28] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [29] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_1_readDataAddr_bits [30] "net io_ports_1_readDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [31] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [13] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [14] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [15] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [16] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [17] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [18] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [19] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [20] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [21] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [22] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [23] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [24] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [25] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [26] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [27] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [28] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [29] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_writeDataAddr_bits [30] "net io_ports_0_writeDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [31] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [13] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [14] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [15] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [16] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [17] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [18] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [19] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [20] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [21] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [22] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [23] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [24] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [25] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [26] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [27] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [28] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [29] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_ports_0_readDataAddr_bits [30] "net io_ports_0_readDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [31] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [18] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [19] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [20] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [21] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [22] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [23] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [24] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [25] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [26] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [27] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [28] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [29] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_source_writeDataAddr_bits [30] "net io_source_writeDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [1] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_readDataAddr_bits [0] "net io_ports_2_readDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [1] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_writeDataAddr_bits [0] "net io_ports_2_writeDataAddr_bits[31:0]"
Toggle io_ports_2_readData_bits [127] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [66] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [67] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [68] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [69] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [71] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [72] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [73] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [74] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [75] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [79] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [80] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [81] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [82] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [83] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [84] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [85] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [86] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [87] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [88] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [90] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [91] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [92] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [94] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [99] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [100] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [101] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [102] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [103] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [104] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [105] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [106] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [107] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [108] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [109] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [110] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [111] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [112] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [113] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [114] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [115] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [116] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [117] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [118] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [119] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [120] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [121] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [122] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [123] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [124] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [125] "net io_ports_2_readData_bits[127:0]"
Toggle io_ports_2_readData_bits [126] "net io_ports_2_readData_bits[127:0]"
Toggle addr [31] "net addr[31:0]"
Toggle addr [15] "net addr[31:0]"
Toggle addr [18] "net addr[31:0]"
Toggle addr [19] "net addr[31:0]"
Toggle addr [20] "net addr[31:0]"
Toggle addr [21] "net addr[31:0]"
Toggle addr [22] "net addr[31:0]"
Toggle addr [23] "net addr[31:0]"
Toggle addr [24] "net addr[31:0]"
Toggle addr [25] "net addr[31:0]"
Toggle addr [26] "net addr[31:0]"
Toggle addr [27] "net addr[31:0]"
Toggle addr [28] "net addr[31:0]"
Toggle addr [29] "net addr[31:0]"
Toggle addr [30] "net addr[31:0]"
CHECKSUM: "1667330293 3927683358"
INSTANCE: CoreMiniAxi.core.score.fetch.ctrl
Toggle _io_bufferRequest_bits_3_addr_T_4 [2] "net _io_bufferRequest_bits_3_addr_T_4[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_4 [1] "net _io_bufferRequest_bits_3_addr_T_4[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_4 [0] "net _io_bufferRequest_bits_3_addr_T_4[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_4 [3] "net _io_bufferRequest_bits_3_addr_T_4[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_2 [2] "net _io_bufferRequest_bits_3_addr_T_2[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_2 [1] "net _io_bufferRequest_bits_3_addr_T_2[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_2 [0] "net _io_bufferRequest_bits_3_addr_T_2[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_2 [3] "net _io_bufferRequest_bits_3_addr_T_2[31:0]"
Toggle _GEN [2] "net _GEN[31:0]"
Toggle _GEN [1] "net _GEN[31:0]"
Toggle _GEN [0] "net _GEN[31:0]"
Toggle _GEN [3] "net _GEN[31:0]"
Toggle predecode_startIdx [2] "net predecode_startIdx[2:0]"
Toggle _GEN_0 [2] "net _GEN_0[2:0]"
Toggle _predecodeValids_T_10 [3] "net _predecodeValids_T_10[4:0]"
Toggle _predecodeValids_T_10 [4] "net _predecodeValids_T_10[4:0]"
Toggle _io_bufferRequest_bits_3_addr_T_6 [2] "net _io_bufferRequest_bits_3_addr_T_6[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_6 [1] "net _io_bufferRequest_bits_3_addr_T_6[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_6 [0] "net _io_bufferRequest_bits_3_addr_T_6[31:0]"
Toggle _io_bufferRequest_bits_3_addr_T_6 [3] "net _io_bufferRequest_bits_3_addr_T_6[31:0]"
Toggle io_bufferRequest_bits_1_addr [0] "net io_bufferRequest_bits_1_addr[31:0]"
Toggle io_bufferRequest_bits_1_addr [1] "net io_bufferRequest_bits_1_addr[31:0]"
Toggle io_bufferRequest_bits_2_addr [0] "net io_bufferRequest_bits_2_addr[31:0]"
Toggle io_bufferRequest_bits_2_addr [1] "net io_bufferRequest_bits_2_addr[31:0]"
Toggle io_bufferRequest_bits_3_addr [0] "net io_bufferRequest_bits_3_addr[31:0]"
Toggle io_bufferRequest_bits_3_addr [1] "net io_bufferRequest_bits_3_addr[31:0]"
Toggle io_bufferRequest_bits_0_addr [0] "net io_bufferRequest_bits_0_addr[31:0]"
Toggle io_bufferRequest_bits_0_addr [1] "net io_bufferRequest_bits_0_addr[31:0]"
CHECKSUM: "3594718726 1426907357"
INSTANCE: CoreMiniAxi.core.score.fetch.fetcher
Toggle io_ibus_addr [2] "net io_ibus_addr[31:0]"
Toggle io_ibus_addr [1] "net io_ibus_addr[31:0]"
Toggle io_ibus_addr [0] "net io_ibus_addr[31:0]"
Toggle io_ibus_addr [3] "net io_ibus_addr[31:0]"
CHECKSUM: "2410233940 4235363127"
INSTANCE: CoreMiniAxi.core.score.mlu
Toggle _stage2Input_q_io_deq_bits_op [2] "net _stage2Input_q_io_deq_bits_op[2:0]"
Toggle _stage3Input_q_io_deq_bits_op [2] "net _stage3Input_q_io_deq_bits_op[2:0]"
Toggle io_req_0_bits_op [2] "net io_req_0_bits_op[2:0]"
Toggle io_req_1_bits_op [2] "net io_req_1_bits_op[2:0]"
Toggle io_req_2_bits_op [2] "net io_req_2_bits_op[2:0]"
Toggle io_req_3_bits_op [2] "net io_req_3_bits_op[2:0]"
Toggle _arb_io_out_bits_op [2] "net _arb_io_out_bits_op[2:0]"
CHECKSUM: "3085788803 4074129935"
INSTANCE: CoreMiniAxi.core.score.lsu.data
Toggle io_in_bits_size [4] "net io_in_bits_size[4:0]"
Toggle io_in_bits_size [3] "net io_in_bits_size[4:0]"
Toggle mem_0_size [4] "reg mem_0_size[4:0]"
Toggle mem_0_size [3] "reg mem_0_size[4:0]"
Toggle io_out_bits_size [4] "net io_out_bits_size[4:0]"
Toggle io_out_bits_size [3] "net io_out_bits_size[4:0]"
Toggle full "net full"
Toggle io_count [1] "net io_count[1:0]"
Toggle count [1] "reg count[1:0]"
Toggle mem_1_sldst "reg mem_1_sldst"
Toggle mem_1_size "reg mem_1_size[4:0]"
Toggle mem_1_sext "reg mem_1_sext"
Toggle mem_1_regionType "reg mem_1_regionType[1:0]"
Toggle mem_1_index "reg mem_1_index[4:0]"
Toggle mem_1_iload "reg mem_1_iload"
Toggle mem_1_addr "reg mem_1_addr[31:0]"
CHECKSUM: "3104090697 871974457"
INSTANCE: CoreMiniAxi.core.score.alu_1
Toggle _GEN_1 [15] "net _GEN_1[18:0]"
Toggle _GEN_1 [13] "net _GEN_1[18:0]"
Toggle _GEN_1 [11] "net _GEN_1[18:0]"
Toggle _GEN_1 [9] "net _GEN_1[18:0]"
Toggle _GEN_1 [7] "net _GEN_1[18:0]"
Toggle _GEN_1 [5] "net _GEN_1[18:0]"
Toggle _GEN_1 [3] "net _GEN_1[18:0]"
Toggle _GEN_1 [1] "net _GEN_1[18:0]"
Toggle _GEN_1 [17] "net _GEN_1[18:0]"
Toggle _GEN_5 [16][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [15][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [14][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [3][31:1] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [2][31:1] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [23][31:16] "net [31:0][31:0]_GEN_5"
Toggle _GEN [30] "net _GEN[31:0]"
Toggle _GEN [29] "net _GEN[31:0]"
Toggle _GEN [28] "net _GEN[31:0]"
Toggle _GEN [27] "net _GEN[31:0]"
Toggle _GEN [26] "net _GEN[31:0]"
Toggle _GEN [25] "net _GEN[31:0]"
Toggle _GEN [24] "net _GEN[31:0]"
Toggle _GEN [23] "net _GEN[31:0]"
Toggle _GEN [22] "net _GEN[31:0]"
Toggle _GEN [21] "net _GEN[31:0]"
Toggle _GEN [20] "net _GEN[31:0]"
Toggle _GEN [19] "net _GEN[31:0]"
Toggle _GEN [18] "net _GEN[31:0]"
Toggle _GEN [17] "net _GEN[31:0]"
Toggle _GEN [16] "net _GEN[31:0]"
Toggle _GEN [15] "net _GEN[31:0]"
Toggle _GEN [14] "net _GEN[31:0]"
Toggle _GEN [13] "net _GEN[31:0]"
Toggle _GEN [12] "net _GEN[31:0]"
Toggle _GEN [11] "net _GEN[31:0]"
Toggle _GEN [10] "net _GEN[31:0]"
Toggle _GEN [9] "net _GEN[31:0]"
Toggle _GEN [8] "net _GEN[31:0]"
Toggle _GEN [7] "net _GEN[31:0]"
Toggle _GEN [6] "net _GEN[31:0]"
Toggle _GEN [5] "net _GEN[31:0]"
Toggle _GEN [31] "net _GEN[31:0]"
Toggle _GEN_5 [31:24][31:0] "net [31:0][31:0]_GEN_5"
CHECKSUM: "3104090697 871974457"
INSTANCE: CoreMiniAxi.core.score.alu_2
Toggle _GEN_1 [15] "net _GEN_1[18:0]"
Toggle _GEN_1 [13] "net _GEN_1[18:0]"
Toggle _GEN_1 [11] "net _GEN_1[18:0]"
Toggle _GEN_1 [9] "net _GEN_1[18:0]"
Toggle _GEN_1 [7] "net _GEN_1[18:0]"
Toggle _GEN_1 [5] "net _GEN_1[18:0]"
Toggle _GEN_1 [3] "net _GEN_1[18:0]"
Toggle _GEN_1 [1] "net _GEN_1[18:0]"
Toggle _GEN_1 [17] "net _GEN_1[18:0]"
Toggle _GEN_5 [16][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [15][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [14][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [3][31:1] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [2][31:1] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [23][31:16] "net [31:0][31:0]_GEN_5"
Toggle _GEN [30] "net _GEN[31:0]"
Toggle _GEN [29] "net _GEN[31:0]"
Toggle _GEN [28] "net _GEN[31:0]"
Toggle _GEN [27] "net _GEN[31:0]"
Toggle _GEN [26] "net _GEN[31:0]"
Toggle _GEN [25] "net _GEN[31:0]"
Toggle _GEN [24] "net _GEN[31:0]"
Toggle _GEN [23] "net _GEN[31:0]"
Toggle _GEN [22] "net _GEN[31:0]"
Toggle _GEN [21] "net _GEN[31:0]"
Toggle _GEN [20] "net _GEN[31:0]"
Toggle _GEN [19] "net _GEN[31:0]"
Toggle _GEN [18] "net _GEN[31:0]"
Toggle _GEN [17] "net _GEN[31:0]"
Toggle _GEN [16] "net _GEN[31:0]"
Toggle _GEN [15] "net _GEN[31:0]"
Toggle _GEN [14] "net _GEN[31:0]"
Toggle _GEN [13] "net _GEN[31:0]"
Toggle _GEN [12] "net _GEN[31:0]"
Toggle _GEN [11] "net _GEN[31:0]"
Toggle _GEN [10] "net _GEN[31:0]"
Toggle _GEN [9] "net _GEN[31:0]"
Toggle _GEN [8] "net _GEN[31:0]"
Toggle _GEN [7] "net _GEN[31:0]"
Toggle _GEN [6] "net _GEN[31:0]"
Toggle _GEN [5] "net _GEN[31:0]"
Toggle _GEN [31] "net _GEN[31:0]"
Toggle _GEN_5 [31:24][31:0] "net [31:0][31:0]_GEN_5"
CHECKSUM: "3104090697 871974457"
INSTANCE: CoreMiniAxi.core.score.alu_3
Toggle _GEN_1 [15] "net _GEN_1[18:0]"
Toggle _GEN_1 [13] "net _GEN_1[18:0]"
Toggle _GEN_1 [11] "net _GEN_1[18:0]"
Toggle _GEN_1 [9] "net _GEN_1[18:0]"
Toggle _GEN_1 [7] "net _GEN_1[18:0]"
Toggle _GEN_1 [5] "net _GEN_1[18:0]"
Toggle _GEN_1 [3] "net _GEN_1[18:0]"
Toggle _GEN_1 [1] "net _GEN_1[18:0]"
Toggle _GEN_1 [17] "net _GEN_1[18:0]"
Toggle _GEN_5 [16][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [15][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [14][31:6] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [3][31:1] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [2][31:1] "net [31:0][31:0]_GEN_5"
Toggle _GEN_5 [23][31:16] "net [31:0][31:0]_GEN_5"
Toggle _GEN [30] "net _GEN[31:0]"
Toggle _GEN [29] "net _GEN[31:0]"
Toggle _GEN [28] "net _GEN[31:0]"
Toggle _GEN [27] "net _GEN[31:0]"
Toggle _GEN [26] "net _GEN[31:0]"
Toggle _GEN [25] "net _GEN[31:0]"
Toggle _GEN [24] "net _GEN[31:0]"
Toggle _GEN [23] "net _GEN[31:0]"
Toggle _GEN [22] "net _GEN[31:0]"
Toggle _GEN [21] "net _GEN[31:0]"
Toggle _GEN [20] "net _GEN[31:0]"
Toggle _GEN [19] "net _GEN[31:0]"
Toggle _GEN [18] "net _GEN[31:0]"
Toggle _GEN [17] "net _GEN[31:0]"
Toggle _GEN [16] "net _GEN[31:0]"
Toggle _GEN [15] "net _GEN[31:0]"
Toggle _GEN [14] "net _GEN[31:0]"
Toggle _GEN [13] "net _GEN[31:0]"
Toggle _GEN [12] "net _GEN[31:0]"
Toggle _GEN [11] "net _GEN[31:0]"
Toggle _GEN [10] "net _GEN[31:0]"
Toggle _GEN [9] "net _GEN[31:0]"
Toggle _GEN [8] "net _GEN[31:0]"
Toggle _GEN [7] "net _GEN[31:0]"
Toggle _GEN [6] "net _GEN[31:0]"
Toggle _GEN [5] "net _GEN[31:0]"
Toggle _GEN [31] "net _GEN[31:0]"
Toggle _GEN_5 [31:24][31:0] "net [31:0][31:0]_GEN_5"
CHECKSUM: "1364679254 257409488"
INSTANCE: CoreMiniAxi.csr
Toggle io_kelvin_csr_value_0 [0] "net io_kelvin_csr_value_0[31:0]"
Toggle io_kelvin_csr_value_0 [1] "net io_kelvin_csr_value_0[31:0]"
Toggle io_fabric_readDataAddr_bits [31] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [13] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [14] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [15] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [16] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [17] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [18] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [19] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [20] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [21] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [22] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [23] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [24] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [25] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [26] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [27] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [28] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [29] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [30] "net io_fabric_readDataAddr_bits[31:0]"
Toggle statusReg [31] "reg statusReg[31:0]"
Toggle statusReg [2] "reg statusReg[31:0]"
Toggle statusReg [3] "reg statusReg[31:0]"
Toggle statusReg [4] "reg statusReg[31:0]"
Toggle statusReg [5] "reg statusReg[31:0]"
Toggle statusReg [6] "reg statusReg[31:0]"
Toggle statusReg [7] "reg statusReg[31:0]"
Toggle statusReg [8] "reg statusReg[31:0]"
Toggle statusReg [9] "reg statusReg[31:0]"
Toggle statusReg [10] "reg statusReg[31:0]"
Toggle statusReg [11] "reg statusReg[31:0]"
Toggle statusReg [12] "reg statusReg[31:0]"
Toggle statusReg [13] "reg statusReg[31:0]"
Toggle statusReg [14] "reg statusReg[31:0]"
Toggle statusReg [15] "reg statusReg[31:0]"
Toggle statusReg [16] "reg statusReg[31:0]"
Toggle statusReg [17] "reg statusReg[31:0]"
Toggle statusReg [18] "reg statusReg[31:0]"
Toggle statusReg [19] "reg statusReg[31:0]"
Toggle statusReg [20] "reg statusReg[31:0]"
Toggle statusReg [21] "reg statusReg[31:0]"
Toggle statusReg [22] "reg statusReg[31:0]"
Toggle statusReg [23] "reg statusReg[31:0]"
Toggle statusReg [24] "reg statusReg[31:0]"
Toggle statusReg [25] "reg statusReg[31:0]"
Toggle statusReg [26] "reg statusReg[31:0]"
Toggle statusReg [27] "reg statusReg[31:0]"
Toggle statusReg [28] "reg statusReg[31:0]"
Toggle statusReg [29] "reg statusReg[31:0]"
Toggle statusReg [30] "reg statusReg[31:0]"
Toggle io_kelvin_csr_value_7 "net io_kelvin_csr_value_7[31:0]"
Toggle io_kelvin_csr_value_5 "net io_kelvin_csr_value_5[31:0]"
Toggle io_fabric_writeDataAddr_bits [31] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [13] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [14] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [15] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [16] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [17] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [18] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [19] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [20] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [21] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [22] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [23] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [24] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [25] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [26] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [27] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [28] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [29] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [30] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_readData_bits [127] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [66] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [67] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [68] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [69] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [71] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [72] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [73] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [74] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [75] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [79] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [80] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [81] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [82] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [83] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [84] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [85] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [86] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [87] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [88] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [90] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [91] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [92] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [94] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [99] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [100] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [101] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [102] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [103] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [104] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [105] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [106] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [107] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [108] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [109] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [110] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [111] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [112] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [113] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [114] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [115] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [116] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [117] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [118] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [119] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [120] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [121] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [122] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [123] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [124] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [125] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_readData_bits [126] "net io_fabric_readData_bits[127:0]"
Toggle io_fabric_writeDataAddr_bits [1] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [0] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [1] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [0] "net io_fabric_readDataAddr_bits[31:0]"
Toggle readDataNext_bits [127] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [66] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [67] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [68] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [69] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [71] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [72] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [73] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [74] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [75] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [79] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [80] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [81] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [82] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [83] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [84] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [85] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [86] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [87] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [88] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [90] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [91] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [92] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [94] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [99] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [100] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [101] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [102] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [103] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [104] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [105] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [106] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [107] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [108] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [109] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [110] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [111] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [112] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [113] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [114] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [115] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [116] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [117] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [118] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [119] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [120] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [121] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [122] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [123] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [124] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [125] "reg readDataNext_bits[127:0]"
Toggle readDataNext_bits [126] "reg readDataNext_bits[127:0]"
CHECKSUM: "3085788803 535168608"
INSTANCE: CoreMiniAxi.core.score.lsu.data
Branch 0 "4174583137" "reset" (7) "reset 0,-,-,-,1,-,-"
Branch 0 "4174583137" "reset" (10) "reset 0,-,-,-,-,-,1"
CHECKSUM: "3771550308 1655166361"
INSTANCE: CoreMiniAxi.fabricMux
Condition 36 "2655219838" "(selected_valid & _io_fabricBusy_T_2 & io_periBusy_1) 1 -1" (2 "101")
Condition 12 "2710421645" "(selected_valid & _io_fabricBusy_T & ((~io_periBusy_0))) 1 -1" (3 "110")
Condition 21 "893366281" "(lastReadSelected_valid & (lastReadSelected_bits == 2'b1)) 1 -1" (1 "01")
Condition 23 "4141091418" "(lastReadSelected_valid & (lastReadSelected_bits == 2'h2)) 1 -1" (1 "01")
Condition 15 "582837442" "(selected_valid & (selected_bits == 2'h2)) 1 -1" (1 "01")
Condition 33 "1351687911" "(_portSelected_T_7 & io_ports_2_writeResp) 1 -1" (1 "01")
Condition 36 "2655219838" "(selected_valid & _io_fabricBusy_T_2 & io_periBusy_1) 1 -1" (1 "011")
Condition 14 "2316655713" "(selected_valid & _io_fabricBusy_T_2 & ((~io_periBusy_1))) 1 -1" (1 "011")
CHECKSUM: "2410233940 1481807882"
INSTANCE: CoreMiniAxi.core.score.mlu
Branch 0 "3563611287" "(_stage3Input_q_io_deq_bits_op == 3'b0)" (2) "(_stage3Input_q_io_deq_bits_op == 3'b0) 0,0"
CHECKSUM: "861662565 535152268"
INSTANCE: CoreMiniAxi.itcmArbiter
Toggle io_source_0_writeDataAddr_valid "net io_source_0_writeDataAddr_valid"
Toggle io_source_0_writeDataStrb "net io_source_0_writeDataStrb[15:0]"
Toggle io_source_0_writeDataBits "net io_source_0_writeDataBits[127:0]"
Toggle io_source_0_writeDataAddr_bits "net io_source_0_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [31] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [13] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [14] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [15] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [16] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [17] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [18] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [19] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [20] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [21] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [22] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [23] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [24] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [25] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [26] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [27] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [28] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [29] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [30] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [31] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [13] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [14] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [15] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [16] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [17] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [18] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [19] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [20] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [21] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [22] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [23] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [24] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [25] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [26] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [27] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [28] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [29] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [30] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [31] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [13] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [14] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [15] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [16] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [17] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [18] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [19] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [20] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [21] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [22] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [23] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [24] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [25] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [26] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [27] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [28] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [29] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [30] "net io_source_1_readDataAddr_bits[31:0]"
CHECKSUM: "861662565 535152268"
INSTANCE: CoreMiniAxi.dtcmArbiter
Toggle io_source_1_readDataAddr_bits [31] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [15] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [16] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [17] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [18] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [19] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [20] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [21] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [22] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [23] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [24] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [25] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [26] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [27] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [28] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [29] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_1_readDataAddr_bits [30] "net io_source_1_readDataAddr_bits[31:0]"
Toggle io_source_0_writeDataAddr_bits [31] "net io_source_0_writeDataAddr_bits[31:0]"
Toggle io_source_0_readDataAddr_bits [31] "net io_source_0_readDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [31] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [15] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [17] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [18] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [19] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [20] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [21] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [22] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [23] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [24] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [25] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [26] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [27] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [28] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [29] "net io_port_writeDataAddr_bits[31:0]"
Toggle 0to1 io_port_writeDataAddr_bits [30] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [31] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [15] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [17] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [18] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [19] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [20] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [21] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [22] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [23] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [24] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [25] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [26] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [27] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [28] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [29] "net io_port_readDataAddr_bits[31:0]"
Toggle io_port_readDataAddr_bits [30] "net io_port_readDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [31] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [15] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [16] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [17] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [18] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [19] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [20] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [21] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [22] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [23] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [24] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [25] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [26] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [27] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [28] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [29] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_source_1_writeDataAddr_bits [30] "net io_source_1_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [31] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [17] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [18] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [19] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [20] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [21] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [22] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [23] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [24] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [25] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [26] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [27] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [28] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [29] "net io_port_writeDataAddr_bits[31:0]"
Toggle io_port_writeDataAddr_bits [30] "net io_port_writeDataAddr_bits[31:0]"
CHECKSUM: "1158443323 3648887436"
INSTANCE: CoreMiniAxi.core.score.csr
Toggle minstret [62] "reg minstret[63:0]"
Toggle minstret [61] "reg minstret[63:0]"
Toggle minstret [60] "reg minstret[63:0]"
Toggle minstret [59] "reg minstret[63:0]"
Toggle minstret [58] "reg minstret[63:0]"
Toggle minstret [57] "reg minstret[63:0]"
Toggle minstret [56] "reg minstret[63:0]"
Toggle minstret [55] "reg minstret[63:0]"
Toggle minstret [54] "reg minstret[63:0]"
Toggle minstret [53] "reg minstret[63:0]"
Toggle minstret [52] "reg minstret[63:0]"
Toggle minstret [51] "reg minstret[63:0]"
Toggle minstret [50] "reg minstret[63:0]"
Toggle minstret [49] "reg minstret[63:0]"
Toggle minstret [48] "reg minstret[63:0]"
Toggle minstret [47] "reg minstret[63:0]"
Toggle minstret [46] "reg minstret[63:0]"
Toggle minstret [45] "reg minstret[63:0]"
Toggle minstret [44] "reg minstret[63:0]"
Toggle minstret [43] "reg minstret[63:0]"
Toggle minstret [42] "reg minstret[63:0]"
Toggle minstret [41] "reg minstret[63:0]"
Toggle minstret [40] "reg minstret[63:0]"
Toggle minstret [39] "reg minstret[63:0]"
Toggle minstret [38] "reg minstret[63:0]"
Toggle minstret [37] "reg minstret[63:0]"
Toggle minstret [36] "reg minstret[63:0]"
Toggle minstret [35] "reg minstret[63:0]"
Toggle minstret [34] "reg minstret[63:0]"
Toggle minstret [63] "reg minstret[63:0]"
Toggle mcycle [62] "reg mcycle[63:0]"
Toggle mcycle [61] "reg mcycle[63:0]"
Toggle mcycle [60] "reg mcycle[63:0]"
Toggle mcycle [59] "reg mcycle[63:0]"
Toggle mcycle [58] "reg mcycle[63:0]"
Toggle mcycle [57] "reg mcycle[63:0]"
Toggle mcycle [56] "reg mcycle[63:0]"
Toggle mcycle [55] "reg mcycle[63:0]"
Toggle mcycle [54] "reg mcycle[63:0]"
Toggle mcycle [53] "reg mcycle[63:0]"
Toggle mcycle [52] "reg mcycle[63:0]"
Toggle mcycle [51] "reg mcycle[63:0]"
Toggle mcycle [50] "reg mcycle[63:0]"
Toggle mcycle [49] "reg mcycle[63:0]"
Toggle mcycle [48] "reg mcycle[63:0]"
Toggle mcycle [47] "reg mcycle[63:0]"
Toggle mcycle [46] "reg mcycle[63:0]"
Toggle mcycle [45] "reg mcycle[63:0]"
Toggle mcycle [44] "reg mcycle[63:0]"
Toggle mcycle [43] "reg mcycle[63:0]"
Toggle mcycle [42] "reg mcycle[63:0]"
Toggle mcycle [41] "reg mcycle[63:0]"
Toggle mcycle [40] "reg mcycle[63:0]"
Toggle mcycle [39] "reg mcycle[63:0]"
Toggle mcycle [38] "reg mcycle[63:0]"
Toggle mcycle [37] "reg mcycle[63:0]"
Toggle mcycle [36] "reg mcycle[63:0]"
Toggle mcycle [35] "reg mcycle[63:0]"
Toggle mcycle [34] "reg mcycle[63:0]"
Toggle mcycle [63] "reg mcycle[63:0]"
Toggle io_csr_out_value_7 "net io_csr_out_value_7[31:0]"
Toggle io_csr_out_value_0 [0] "net io_csr_out_value_0[31:0]"
Toggle io_csr_out_value_0 [1] "net io_csr_out_value_0[31:0]"
Toggle io_csr_out_value_5 "net io_csr_out_value_5[31:0]"
Toggle io_counters_storeCount [1] "net io_counters_storeCount[1:0]"
Toggle mode "reg mode"
Toggle io_bru_out_mode "net io_bru_out_mode"
Toggle frm "reg frm[2:0]"
Toggle msp "reg msp[31:0]"
Toggle fflags "reg fflags[4:0]"
CHECKSUM: "2612366597 2519095480"
INSTANCE: CoreMiniAxi.dtcmWrapper
Toggle io_fabric_readDataAddr_bits [15] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [17] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [18] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [19] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [20] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [21] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [22] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [23] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [24] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [25] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [26] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [27] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [28] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [29] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [30] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_readDataAddr_bits [31] "net io_fabric_readDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [31] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [15] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [17] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [18] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [19] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [20] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [21] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [22] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [23] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [24] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [25] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [26] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [27] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [28] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [29] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [30] "net io_fabric_writeDataAddr_bits[31:0]"
CHECKSUM: "735895333 757961267"
INSTANCE: CoreMiniAxi.core.score.lsu.ctrl
Toggle io_in_bits_3_bits_vldst "net io_in_bits_3_bits_vldst"
Toggle io_out_bits_vldst "net io_out_bits_vldst"
Toggle io_in_bits_0_bits_vldst "net io_in_bits_0_bits_vldst"
Toggle io_in_bits_1_bits_fencei "net io_in_bits_1_bits_fencei"
Toggle io_in_bits_1_bits_flushat "net io_in_bits_1_bits_flushat"
Toggle io_in_bits_1_bits_flushall "net io_in_bits_1_bits_flushall"
Toggle io_in_bits_1_bits_sldst "net io_in_bits_1_bits_sldst"
Toggle io_in_bits_1_bits_vldst "net io_in_bits_1_bits_vldst"
Toggle io_in_bits_2_bits_fencei "net io_in_bits_2_bits_fencei"
Toggle io_in_bits_2_bits_flushat "net io_in_bits_2_bits_flushat"
Toggle io_in_bits_2_bits_flushall "net io_in_bits_2_bits_flushall"
Toggle io_in_bits_2_bits_sldst "net io_in_bits_2_bits_sldst"
Toggle io_in_bits_2_bits_vldst "net io_in_bits_2_bits_vldst"
Toggle io_in_bits_3_bits_fencei "net io_in_bits_3_bits_fencei"
Toggle io_in_bits_3_bits_flushat "net io_in_bits_3_bits_flushat"
Toggle io_in_bits_3_bits_flushall "net io_in_bits_3_bits_flushall"
Toggle io_in_bits_3_bits_sldst "net io_in_bits_3_bits_sldst"
CHECKSUM: "3100061340 2042411555"
INSTANCE: CoreMiniAxi.core.score.lsu.ctrl.mslice
Toggle io_in_bits_vldst "net io_in_bits_vldst"
Toggle io_in_bits_pc [1] "net io_in_bits_pc[31:0]"
Toggle io_in_bits_pc [0] "net io_in_bits_pc[31:0]"
Toggle mem_0_size [4] "reg mem_0_size[4:0]"
Toggle mem_0_size [3] "reg mem_0_size[4:0]"
Toggle io_out_bits_size [4] "net io_out_bits_size[4:0]"
Toggle io_out_bits_size [3] "net io_out_bits_size[4:0]"
Toggle io_in_bits_size [4] "net io_in_bits_size[4:0]"
Toggle io_in_bits_size [3] "net io_in_bits_size[4:0]"
Toggle mem_0_pc [1] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [12] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [13] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [14] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [15] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [16] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [17] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [18] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [19] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [20] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [21] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [22] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [23] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [24] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [25] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [26] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [27] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [28] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [29] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [30] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [31] "reg mem_0_pc[31:0]"
Toggle mem_0_pc [0] "reg mem_0_pc[31:0]"
Toggle io_out_bits_pc [1] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [12] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [13] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [14] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [15] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [16] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [17] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [18] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [19] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [20] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [21] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [22] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [23] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [24] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [25] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [26] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [27] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [28] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [29] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [30] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [31] "net io_out_bits_pc[31:0]"
Toggle io_out_bits_pc [0] "net io_out_bits_pc[31:0]"
Toggle mem_0_vldst "reg mem_0_vldst"
Toggle io_out_bits_vldst "net io_out_bits_vldst"
CHECKSUM: "4119519692 2774850443"
INSTANCE: CoreMiniAxi.itcmWrapper
Toggle io_fabric_writeDataAddr_bits [31] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [13] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [14] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [15] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [16] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [17] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [18] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [19] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [20] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [21] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [22] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [23] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [24] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [25] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [26] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [27] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [28] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [29] "net io_fabric_writeDataAddr_bits[31:0]"
Toggle io_fabric_writeDataAddr_bits [30] "net io_fabric_writeDataAddr_bits[31:0]"
CHECKSUM: "1158443323 3822375769"
INSTANCE: CoreMiniAxi.core.score.csr
Block 10 "3916833544" "mpc <= io_csr_in_value_0;"
Block 53 "3957477798" "fflags <= wdata[4:0];"
Block 15 "1331663529" "msp <= wdata;"
CHECKSUM: "3085788803 3310290304"
INSTANCE: CoreMiniAxi.core.score.lsu.data
Block 13 "841050544" "mem_0_addr <= mem_1_addr;"
Block 18 "1946186469" "mem_1_addr <= io_in_bits_addr;"
CHECKSUM: "1667330293 3489276705"
INSTANCE: CoreMiniAxi.core.score.fetch.ctrl
Condition 3 "2148022757" "(((~_pc_T)) & pc_valid) 1 -1" (2 "10")