tree 126e67a850338811ada1742451acf848e9af47e0
parent b9b0d55ba96b549756bb207a33dae793a9495859
author Alex Van Damme <atv@google.com> 1755635232 -0700
committer Alex Van Damme <atv@google.com> 1756424998 -0700

refactor(bus): Clean up AXI/TL-UL bridges and tests

This commit refactors the AXI-to-TileLink and TileLink-to-AXI bridge
logic and cleans up the associated test infrastructure.

Key changes:
- Simplified the ready signal logic in `Axi2TLUL.scala` for better
  clarity and correctness.
- Moved the cocotb test files for the AXI/TL-UL bridges from
  `hdl/chisel/src/bus` to a dedicated `tests/cocotb/tlul` directory.
- Reorganized the Bazel BUILD files to reflect the new test locations
  and improve dependency management.
- Added minor delays at the end of the `tlul2axi` tests to facilitate
  easier waveform debugging.

Change-Id: I9a2a3c6510d34b010e0ecc2ba1da1db3e1462f2b