diff --git a/hdl/verilog/rvv/Aligner.sv b/hdl/verilog/rvv/design/Aligner.sv
similarity index 100%
rename from hdl/verilog/rvv/Aligner.sv
rename to hdl/verilog/rvv/design/Aligner.sv
diff --git a/hdl/verilog/rvv/Aligner_tb.sv b/hdl/verilog/rvv/design/Aligner_tb.sv
similarity index 100%
rename from hdl/verilog/rvv/Aligner_tb.sv
rename to hdl/verilog/rvv/design/Aligner_tb.sv
diff --git a/hdl/verilog/rvv/BUILD b/hdl/verilog/rvv/design/BUILD
similarity index 100%
rename from hdl/verilog/rvv/BUILD
rename to hdl/verilog/rvv/design/BUILD
diff --git a/hdl/verilog/rvv/MultiFifo.sv b/hdl/verilog/rvv/design/MultiFifo.sv
similarity index 100%
rename from hdl/verilog/rvv/MultiFifo.sv
rename to hdl/verilog/rvv/design/MultiFifo.sv
diff --git a/hdl/verilog/rvv/MultiFifo_tb.sv b/hdl/verilog/rvv/design/MultiFifo_tb.sv
similarity index 100%
rename from hdl/verilog/rvv/MultiFifo_tb.sv
rename to hdl/verilog/rvv/design/MultiFifo_tb.sv